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SY10E141JCTR Datasheet

  • SY10E141JCTR

  • 8-BIT SHIFT REGISTER

  • 4頁(yè)

  • MICREL   MICREL

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8-BIT SHIFT
REGISTER
SY10E141
SY100E141
FEATURES
s
700MHz min. shift frequency
s
Extended 100E V
EE
range of 鈥?.2V to 鈥?.5V
s
8 bits wide
s
Bi-directional
s
Four selectable modes for full functionality
s
Asynchronous Master Reset
s
Fully compatible with industry standard 10KH,
100K ECL levels
s
Internal 75K
鈩?/div>
input pulldown resistors
s
Fully compatible with Motorola MC10E/100E141
s
Pin-compatible with E241
s
Available in 28-pin PLCC package
DESCRIPTION
The SY10/100E141 are 8-bit, full-function shift registers
designed for use in new, high-performance ECL systems.
The E141 performs serial/parallel in and serial/parallel out,
shifting in either direction. The eight inputs D
0
鈥揇
7
accept
parallel input data, while DL/DR accept serial input data for
left/right shifting.
The two select pins, SEL
0
and SEL
1
permit four modes
of operation: Load, Hold, Shift Left and Shift Right, as
shown in the Truth Table. Input data is clocked into the
register on the rising clock edge after meeting the minimum
set-up time. A logic HIGH on the Master Reset (MR) pin
asynchronously resets all the registers to zero.
BLOCK DIAGRAM
DL
BITS 1-6
D
DR
D
0
Q
R
Q
0
D
D
Q
R
Q
D
7
D
Q
R
Q
7
SEL1
SEL0
CLK
MR
Rev.: C
Amendment: /1
1
Issue Date: February, 1998

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