鈩?/div>
PECL input pull-down resistors
s
Available in 28-pin PLCC and SOIC packages
DESCRIPTION
The SY100S811 is a low skew 1-to-9 PECL differential
driver designed for clock distribution in new, high-
performance PECL systems. It accepts either a PECL
clock input or a TTL input by using the TTL enable pin T
EN
.
When the TTL enable pin is HIGH, the TTL input is enabled
and the PECL input is disabled. When the enable pin is set
LOW, the TTL input is disabled and the PECL input is
enabled.
The device is specifically designed and produced for low
skew. The interconnect scheme and metal layout are
carefully optimized for minimal gate-to-gate skew within
the device. Wafer characterization and process control
ensure consistent distribution of propagation delay from lot
to lot. Since the S811 shares a common set of 鈥渂asic鈥?/div>
processing with the other members of the ECLinPS family,
wafer characterization at the point of device personalization
allows for tighter control of parameters, including
propagation delay.
To ensure that the skew specification is met, it is
necessary that both sides of the differential output are
terminated into 50鈩? even if only one side is being used. ln
most applications, all nine differential pairs will be used
and, therefore, terminated. In the case where fewer than
nine pairs are used, it is necessary to terminate at least the
output pairs on the same package side (i.e. sharing the
same V
CCO
as the pair(s) being used on that side) in order
to maintain minimum skew.
The V
BB
output is intended for use as a reference
voltage for single-ended reception of PECL signals to that
device only. When using V
BB
for this purpose, it is
recommended that V
BB
is decoupled to V
CC
via a 0.01碌F
capacitor.
BLOCK DIAGRAM
Q
0
Q
0
Q
1
E
IN
E
IN
0
Q
2
Q
2
Q
3
T
IN
1
Q
3
Q
4
Q
4
T
EN
Q
5
Q
1
PIN CONFIGURATION
V
CCO
Q
1
Q
5
Q
0
Q
0
Q
1
Q
6
Q
6
Q
7
Q
7
Q
8
V
BB
Q
8
V
EE
T
EN
E
IN
V
CC
E
IN
V
BB
T
IN
26
27
28
1
2
3
4
25 24 23 22 21 20 19
18
17
Q
2
Q
2
TOP VIEW
PLCC
J28-1
16
15
14
13
12
Q
3
Q
3
Q
4
V
CCO
Q
4
Q
5
Q
5
5
6
7
8
9
10 11
V
CCO
Q
8
Q
8
Q
7
Q
7
Q
6
Q
6
Rev.: F
Amendment: /0
1
Issue Date: October, 1998
1
2
3
4
5
