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SY100S366JC Datasheet

  • SY100S366JC

  • 9-BIT COMPARATOR

  • 6頁(yè)

  • MICREL   MICREL

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9-BIT
COMPARATOR
SY100S366
FEATURES
s
Max. propagation delay of 1500ps
s
I
EE
min. of 鈥?20mA
s
Industry standard 100K ECL levels
s
Extended supply voltage option:
V
EE
= 鈥?.2V to 鈥?.5V
s
Voltage and temperature compensation for improved
noise immunity
s
Internal 75K
鈩?/div>
input pull-down resistors
s
120% faster than Fairchild
s
Approximately 40% lower power than Fairchild
s
Function and pinout compatible with Fairchild F100K
s
Available in 24-pin CERPACK and 28-pin PLCC
packages
DESCRIPTION
The SY100S366 is an ultra-fast 9-bit magnitude
comparator designed for use in high-performance ECL
systems. The device compares the arithmetic value of two
9-bit words and indicates whether one word is greater than
or equal to the other. The inputs on the device have 75K鈩?/div>
pull-down resistors.
PIN CONFIGURATIONS
A
5
A
4
V
EES
A
6
A
3
A
2
A
1
11 10 9 8 7 6 5
A
7
A
8
V
EE
V
EES
B
8
B
7
B
6
12
13
14
15
16
17
18
4
3
2
1
28
27
26
A
0
A>B
V
CCA
V
CC
V
CC
A=B
B>A
Top View
PLCC
J28-1
19 20 21 22 23 24 25
B
7
B
8
V
EE
B
6
A
8
B
5
B
4
B
3
PIN NAMES
Pin
A
0
鈥?A
8
B
0
鈥?B
8
A>B
B>A
A=B
V
EES
V
CCA
Function
A Data Inputs
B Data Inputs
A Greater Than B Output
B Greater Than A Output
Complement A Equal to B Output
(Active LOW)
V
EE
Substrate
V
CCO
for ECL Outputs
V
EES
B
2
B
1
B
0
B
5
B
4
B
3
B
2
B
1
B
0
1
2
3
4
5
6
24 23 22 21 20 19
18
Top View
Flatpack
F24-1
17
16
15
14
A
7
A
6
A
5
A
4
A
3
A
2
A
1
13
7 8 9 10 11 12
B>A
Rev.: G
A>B
A
0
Amendment: /0
A=B
V
CC
1
Issue Date: July, 1999
V
CCA

SY100S366JC 產(chǎn)品屬性

  • 38

  • 集成電路 (IC)

  • 邏輯 - 比較器

  • 100S

  • 幅值比較器

  • 9

  • 高有效

  • A<B，A=B，A>B

  • -4.2 V ~ -5.5 V

  • -

  • 1.5ns @ -4.2V ~ -5.5V，-

  • -

  • 0°C ~ 85°C

  • 28-LCC（J 形引線）

  • 表面貼裝

  • 管件

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