音影先锋亚洲天堂网|电影世界尽头的爱完整版播放|国产 熟女 91|高清无码免费观看欧美日韩|韩国一区二区三区黄色录像|美女亚洲加勒比在线|亚洲综合网 开心五月|7x成人在线入口|成人网站免费日韩毛片区|国产黄片?一级?二级?三级

SY100H841ZC Datasheet

  • SY100H841ZC

  • SINGLE SUPPLY QUAD PECL-TO-TTL W/LATCHED OUTPUT ENABLE

  • 74.41KB

  • 6頁

  • MICREL   MICREL

掃碼查看芯片數(shù)據(jù)手冊

上傳產(chǎn)品規(guī)格書

PDF預覽

SINGLE SUPPLY QUAD
PECL-TO-TTL W/LATCHED
OUTPUT ENABLE
FEATURES
s
Translates positive ECL to TTL (PECL-to-TTL)
s
300ps pin-to-pin skew
s
500ps part-to-part skew
s
Differential internal design for increased noise
immunity and stable threshold inputs
s
V
BB
reference output
s
Single supply
s
Enable input
s
Latch enable input
s
Extra TTL and ECL power/ground pins to reduce
cross-talk/noise
s
High drive capability: 24mA each output
s
Fully compatible with industry standard 10K, 100K
I/O levels
s
Available in 16-pin SOIC package
ClockWorks鈩?/div>
SY10H841
SY100H841
FINAL
DESCRIPTION
The SY10/100H841 are single supply, low skew
translating 1:4 clock drivers.
The devices feature a 24mA TTL output stage, with
AC performance specified into a 50pF load capacitance.
A latch is provided on-chip. When LEN is LOW (or left
open, in which case it is pulled low by the internal pull-
downs) the latch is transparent. A HIGH on the enable
pin (EN) forces all outputs LOW.
As frequencies increase to 40MHz and above, precise
timing and shaping of clock signals becomes extremely
important. The H841 solves several clock distribution
problems such as minimizing skew (300ps), maximizing
clock fanout (24mA drive), and precise duty cycle control
through a proprietary differential internal design.
The 10K version is compatible with 10KH ECL logic
levels. The 100K version is compatible with 100K levels.
BLOCK DIAGRAM
PIN CONFIGURATION
LEN
EN
G
E
V
E
1
2
3
4
5
6
7
8
SOIC
Z16-1
16
15
14
13
12
11
10
9
Q
3
G
T
Q
2
V
T
V
T
Q
1
G
T
Q
0
Q
0
Q
1
D
D
V
BB
Q
2
V
BB
D
D
LEN
Pin
G
T
D Q
Q
3
PIN NAMES
Function
TTL Ground (0V)
TTL V
CC
(+5.0V)
ECL V
CC
(+5.0V)
ECL Ground (0V)
Signal Input (PECL)
V
BB
Reference Output (PECL)
Signal Outputs (TTL)
Enable Input (PECL)
Latch Enable Input
Rev.: F
Amendment: /0
EN
G
T
V
T
V
E
G
E
D, D
V
BB
Q
0
- Q
3
EN
LEN
1
Issue Date: May, 1999

SY100H841ZC 產(chǎn)品屬性

  • 47

  • 集成電路 (IC)

  • 時鐘/計時 - 時鐘緩沖器，驅(qū)動器

  • Precision Edge®

  • 扇出緩沖器（分配）

  • 1

  • 1:4

  • 是/是

  • PECL

  • TTL

  • 160MHz

  • 4.75 V ~ 5.25 V

  • 0°C ~ 85°C

  • 表面貼裝

  • 16-SOIC（0.295"，7.50mm 寬）

  • 16-SOIC

  • 管件

SY100H841ZC相關(guān)型號PDF文件下載

掃碼下載APP，
一鍵連接廣大的電子世界。

在線人工客服

買家服務：
賣家服務：
技術(shù)客服：

0571-85317607

網(wǎng)站技術(shù)支持

13606545031

客服在線時間周一至周五
9:00-17:30

關(guān)注官方微信號，
第一時間獲取資訊。

建議反饋

聯(lián)系人：

聯(lián)系方式：

按住滑塊，拖拽到最右邊
>>
感謝您向阿庫提出的寶貴意見，您的參與是維庫提升服務的動力！意見一經(jīng)采納，將有感恩紅包奉上哦！