鈩?/div>
input pull down resistors
s
Available in 20-pin SOIC package
SY100EL17V
FINAL
DESCRIPTION
The SY100EL17V is a quad differential receiver. The
device is functionally equivalent to the E116 device with the
capability of operation from either a ECL supply voltage
(鈥?.3V or 鈥?V) or PECL supply voltage (+3.3V or +5V).
The EL17V provides a V
BB
output for either single-ended
use or as a DC bias for AC coupling to the device. The V
BB
pin should be used only as a bias for the EL17V as its
current sink/source capability is limited. Whenever used,
the V
BB
pin should be bypassed to ground via a 0.01碌f
capacitor.
Under open input conditions, the /D input will be biased
at V
CC
/2 and the D input will be pulled down to V
EE
. This
operation will force the Q output LOW and ensure stability.
PIN CONFIGURATION/BLOCK DIAGRAM
V
CC
1
D
0
2
D
0
3
D
1
4
D
1
5
D
2
6
D
2
7
D
3
8
D
3
9
V
BB
10
20
V
CC
19
18
17
16
15
14
13
12
11
Q
0
Q
0
Q
1
Q
1
Q
2
Q
2
Q
3
Q
3
V
EE
D
n
Q
n
V
BB
PIN NAMES
Pin
Data Inputs
Data Outputs
Reference Voltage Output
Function
SOIC
TOP VIEW
Rev.: D
Amendment: /0
1
Issue Date: February 2003