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SX52BD/PQ Datasheet

  • SX52BD/PQ

  • Configurable Communications Controllers with EE/Flash Progra...

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April, 2002
SX48BD/SX52BD
Configurable Communications Controllers with EE/Flash Program
Memory, In-System Programming Capability, and On-Chip Debug
1.0
1.1
PRODUCT OVERVIEW
Introduction
On-chip functions include two 16-bit timers with 8-bit
prescalers supporting different operating modes (PWM,
simultaneous PWM/capture, and external event counter),
a general-purpose 8-bit timer with prescaler, an analog
comparator, a brown-out detector, a watchdog timer, a
power-save mode with multi-source wakeup capability,
an internal R/C oscillator, user-selectable clock modes,
and high-current outputs.
The SX48BD and SX52BD are functionally the same,
except for the package type and pinout. The SX48BD
has four fewer pins and has only four rather than eight
I/O pins for Port A.
The Ubicom SX48BD/SX52BD are members of the SX
family of configurable communications controllers fabri-
cated in an advanced CMOS process technology. The
advanced process, combined with a RISC-based archi-
tecture, allows high-speed computation, flexible I/O con-
trol, and efficient data manipulation. Throughput is
enhanced by operating the device at frequencies up to 75
MHz and by optimizing the instruction set to include
mostly single-cycle instructions. In addition, the SX archi-
tecture is deterministic and totally reprogramable. The
unique combination of these characteristics enables the
device to implement hard real-time functions as software
modules (Virtual Peripheral鈩? to replace traditional hard-
ware functions.
SLEEP Clock
OSC1 OSC2
OSC Driver
Clock
Select
WDT Clock
8-bit Watchdog
Timer (WDT)
RTCC
8-bit Timer
RTCC
Interrupt
Stack
8
3
Port B
COMPARATOR
4/8
8
8
8
4MHz Internal
RC OSC
(divided by
8 steps)
System Clock
Power-On
Reset
Brown-Out
MCLR
RESET
MIWU
8
PC
8 Level
Stack
W
Prescaler for RTCC
or
Postscaler for WDT
System
Clock
Interrupt
MIWU
8
Port A Port C Port D Port E
8
8
8
8
8
Instruction
8
Pipeline
Fetch
Decode
Internal Data Bus
8
8
8
Address
8 8
FSR
PC
STATUS
OPTION
MODE
ALU
Data
262 Bytes
SRAM
In-System
Debugging
In-System
Programming
4k Words
EEPROM
Port B
16-Bit
Timer 1
8-Bit
Prescaler
Port C
16-Bit
Timer 2
8-Bit
Prescaler
Execute
Write Back
Address
12
8 Write Data
Read Data
8
Instruction
12
IREAD
Figure 1-1. Block Diagram
Ubicom鈩?and the Ubicom logo are trademarks of Ubicom, Inc.
I
2
C鈩?is a trademark of Philips Corporation.
All other trademarks mentioned in this document are property of their respec-
tive companies.
漏 2002 Ubicom, Inc. All rights reserved.
-1-
www.ubicom.com

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