鈻?/div>
16/32-bit 96 MHz ARM9E based MCU
鈥?ARM966E-S RISC core: Harvard archi-
tecture, 5-stage pipeline, Tightly-Coupled
Memories (SRAM and Flash)
鈥?STR91xFA implementation of core adds
high-speed burst Flash memory interface,
instruction prefetch queue, branch cache
鈥?Up to 96 MIPS directly from Flash memory
鈥?Single-cycle DSP instructions supported
鈥?Binary compatible with ARM7 code
Dual burst Flash memories, 32-bits wide
鈥?256 KB/512 KB/1 MB/2 MB Main Flash
鈥?32 KB/128 KB Secondary Flash
鈥?Sequential Burst operation up to 96 MHz
鈥?100 K min erase cycles, 20 yr min retention
SRAM, 32-bits wide
鈥?96K bytes, optional battery backup
9 programmable DMA channels
Clock, reset, and supply management
鈥?Internal oscillator operating with external
4-25 MHz crystal
鈥?Internal PLL up to 96 MHz
鈥?Real-time clock provides calendar
functions, tamper, and wake-up functions
鈥?Reset Supervisor monitors supply voltage,
watchdog, wake-up unit, external reset
鈥?Brown-out monitor
鈥?Run, Idle, and Sleep Mode as low as 50 uA
Vectored interrupt controller (VIC)
鈥?32 IRQ vectors, 30 interrupt pins
鈥?Branch cache minimizes interrupt latency
8-channel, 10-bit A/D converter (ADC)
鈥?0 to 3.6 V range, 0.7 usec conversion
10 Communication interfaces
鈥?10/100 Ethernet MAC with DMA and MII
鈥?USB Full-speed (12 Mbps) slave device
鈻?/div>
鈻?/div>
LQFP80 12 x12mm
LQFP128 14 x 14mm
LFBGA144 10 x 10 x 1.7
鈻?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈻?/div>
CAN interface (2.0B Active)
3 16550-style UARTs with IrDA protocol
2 Fast I
2
C鈩? 400 kHz
2 channels for SPI鈩? SSI鈩? or Microwire鈩?/div>
鈻?/div>
鈻?/div>
鈻?/div>
External Memory Interface (EMI)
鈥?8- or 16-bit data, up to 24-bit addressing
鈥?Static Async modes for LQFP128
鈥?Additional burst synchronous modes for
LFBGA144
Up to 80 I/O pins (muxed with interfaces)
16-bit standard timers (TIM)
鈥?4 timers each with 2 input capture, 2 output
compare, PWM and pulse count modes
3-Phase induction motor controller (IMC)
JTAG interface with boundary scan
Embedded trace module (ARM ETM9)
Device summary
Part number
STR910FAM32, STR910FAW32,
STR910FAZ32, STR912FAW32
STR911FAM42, STR911FAW42,
STR912FAW42, STR912FAZ42
STR911FAM44 STR911FAW44
STR912FAW44, STR912FAZ44
STR911FAM46, STR911FAW46,
STR912FAW46, STR912FAZ46
STR911FAM47, STR911FAW47,
STR912FAW47, STR912FAZ47
鈻?/div>
鈻?/div>
鈻?/div>
Table 1.
Reference
鈻?/div>
STR91xFAx32
STR91xFAx42
STR91xFAx44
STR91xFAx46
STR91xFAx47
鈻?/div>
鈻?/div>
May 2008
Rev 3
1/101
www.st.com
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