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STPIC6A259M Datasheet

  • STPIC6A259M

  • POWER LOGIC 8-BIT ADDRESSABLE LATCH

  • 13頁

  • STMICROELECTRONICS   STMICROELECTRONICS

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STPIC6A259
POWER LOGIC 8-BIT ADDRESSABLE LATCH
PRELIMINARY DATA
s
s
s
s
s
s
s
LOW R
DS(on)
: 1鈩?TYP
OUTPUT SHORT-CIRCUIT PROTECTION
75mJ AVAILANCHE ENERGY
EIGHT 350mA DMOS OUTPUTS
50V SWITCHING CAPABILITY
FOUR DISTINCT FUNCTION MODES
LOW POWER CONSUMPTION
SOP
DESCRIPTION
This power logic 8-bit addressable latch controls
open-drain DMOS transistor outputs and is
designed
for
general-purpose
storage
applications in digital systems. Specific uses
include working registers, serial-holding registers,
and decoders or demultiplexers. This is a
multifunctional device capable of operating as
eight addressable latches or an 8-line
demultiplexer with active-low DMOS outputs.
Each open-drain DMOS transistor features an
independent chopping current-limiting circuit to
prevent damage in the case of a short circuit.
Four distinct modes of operation are selectable by
controlling the clear (CLR) and enable (G) inputs
and enumerated in the function table. In the
addressable-latch mode, data at the data-in (D)
terminal is written into the addressed latch. The
addressed DMOS-transistor output inverts the
data input with all unadressed DMOS-transistor
output remaining in their previuous state. In the
MOS-transistor outputs remain in their previous
states and are unaffected by the data or address
inputs. To eliminate the possibility of entering
erroneus data in the latch, enable G should be
ORDERING CODES
Type
STPIC6A259M
STPIC6A259MTR
held high (inactive) while the address lines are
changing. In the 8-line demoultiplexing mode, the
addressed output is inverted with respectto the D
input and all other output are high. In the clear
mode, all outputs are high and unaffected by the
address and data inputs.
Separate power ground (PGND) and logic ground
(LGND) terminals are providied to facilitate
maximum system flexibility. All PGND terminals
are interally connected, and each pGND terminal
must be externally connected to the power system
ground in order to minimize parasitic impedance.
A single-point connection between LGND and
PGND must be made externally in a manner that
reduces crosstalk between the logi and load
circuits.
The STPIC6A259 is offered in a termally
enhanced SO-24 package. The STPIC6A259 is
characterized for operation over the operating
case temperature range -40擄C to 125擄C.
Package
SO-24 Batwing (Tube)
SO-24 Batwing (Tape & Reel)
Comments
50parts per tube / 20tube per box
2500 parts per reel
March 2001
1/13
This is preliminary information on a new product now in development are or undergoing evaluation. Details subject to change without notice.

STPIC6A259M 產品屬性

  • STMicroelectronics

  • 閉鎖

  • 8

  • Addressable Latch

  • STPIC

  • Non-Inverting

  • 8

  • 30 ns at 5 V

  • 5.5 V

  • 4.5 V

  • + 125 C

  • - 40 C

  • SOP-24

  • Tube

  • SMD/SMT

  • 1

  • 32

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