Using the latest high voltage MESH OVERLAY鈩?/div>
process, STMicroelectronics has designed an
advanced family of power MOSFETs with
outstanding performances. The new patent
pending strip layout coupled with the Company鈥檚
proprietary edge termination structure, gives the
lowest RDS(on) per area, exceptional avalanche
and dv/dt capabilities and unrivalled gate charge
and switching characteristics.
APPLICATIONS
s
HIGH CURRENT, HIGH SPEED SWITCHING
s
SWITCH MODE POWER SUPPLIES (SMPS)
s
DC-AC CONVERTERS FOR WELDING
EQUIPMENT AND UNINTERRUPTIBLE
POWER SUPPLIES AND MOTOR DRIVE
ABSOLUTE MAXIMUM RATINGS
Symbol
V
DS
V
DGR
V
GS
I
D
I
D
I
DM
(鈥?
P
tot
dv/dt(
1
)
V
ISO
T
s tg
T
j
Parameter
Drain-source Voltage (V
GS
= 0)
Drain- gate Voltage (R
GS
= 20 k鈩?
G ate-source Voltage
Drain Current (continuous) at T
c
= 25 C
Drain Current (continuous) at T
c
= 100 C
Drain Current (pulsed)
T otal Dissipation at T
c
= 25 C
Derating Factor
Peak Diode Recovery voltage slope
Insulation W ithstand Voltage (DC)
Storage Temperature
Max. Operating Junction Temperature
o
o
o
TO-220
TO-220FP
INTERNAL SCHEMATIC DIAGRAM
Value
ST P3NB100 STP3NB100F P
1000
1000
鹵
30
3
1.9
12
100
0.8
4.5
錚?/div>
-65 to 150
150
(
1
) I
SD
鈮?3 螒,
di/dt
鈮?/div>
200 A/
碌
s, V
DD
鈮?/div>
V
(BR)DSS
, Tj
鈮?/div>
T
JMAX
Un it
V
V
V
3(**)
1.1
12
35
0.28
4.5
2000
A
A
A
W
W/ C
V/ns
V
o
o
o
C
C
(
鈥?/div>
) Pulse width limited by safe operating area
(
**) Limited only by T
MAX
October 1998
1/6
STP3NB100FP相關(guān)型號PDF文件下載
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