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危鈭?/div>
A/D AND D/A
CONVERTERS
83dB SIGNAL TO NOISE RATIO FOR SAM-
PLING FREQUENCY UP TO 9.6kHz @ 3V
87dB DYNAMIC RANGE @ 3V
FILTER BANDWIDTHS :
0.425 x THE SAMPLING FREQUENCY
ON-CHIP REFERENCE VOLTAGE
SINGLE POWER SUPPLY RANGE :
2.7 TO 5.5V
LOW POWER CONSUMPTION LESS THAN
30mW OPERATING POWER 3V
STAND-BY MODE POWER CONSUMPTION
LESS THAN 3碌W at 3V
PROGRAMMING SAMPLING FREQUENCY
MAX. SAMPLING FREQUENCY : 45kHz
SYNCHRONOUS SERIAL INTERFACE FOR
PROCESSOR DATAS EXCHANGE. MASTER
OR SLAVE OPERATIONS
0.50碌m CMOS PROCESS
TQFP44 PACKAGE
STLC7546 MODE OF OPERATION COMPATIBLE
Maximum Power Dissipation 30mW is well suited
for Battery operations.
In case of battery low, STLC7550 will continue to
work even at a 2.7V level.
STLC7550 also provides clock generator for all
sampling frequencies requested for V.34bis and
56Kbps applications.
This new AFE can also be used for PC mother
boards or add-on cards or stand alone MODEMs.
It can be used in a master mode or slave mode.
The slave mode eases multi AFE architecture de-
sign in saving external logical glue.
TQFP44
(10 x 10 x 1.40 mm)
(Full Plastic Quad Flat Pack)
ORDER CODE :
STLC7550TQFP
DESCRIPTION
The STLC7550 is a single chip Analog Front-end
(AFE) designed to implement modems up to
56Kbps.
It has been especially designed for host processing
application in which the modulation software
(V.34bis, 56Kbps) is performed by the main applica-
tion processor : Pentium, Risc or DSP processors.
The main target of this device is stand alone appli-
ances as Hand Held PC (HPC), Personnal Digital
Assistants (PDA), Webphones, Network Comput-
ers, Set Top Boxes for Digital Television (Satellite
and Cable).
To comply with such applications STLC7550 is
powered nominally at 3V only.
November 1998
TQFP48
(7 x 7 x 1.40mm)
(Full Plastic Quad Flat Pack)
ORDER CODE :
STLC7550TQF7
1/17