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STLC5412P Datasheet

  • STLC5412P

  • 2B1Q U INTERFACE DEVICE ENHANCED WITH DECT MODE

  • 652.75KB

  • 74頁

  • STMICROELECTRONICS   STMICROELECTRONICS

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STLC5412
2B1Q U INTERFACE DEVICE
ENHANCED WITH DECT MODE
PRELIMINARY DATA
GENERAL FEATURES
SINGLE CHIP 2B1Q LINE CODE TRANSCEIVER
SUITABLE FOR ISDN, PAIR GAIN AND DECT
APPLICATIONS
MEETS OR EXCEEDS ETSI EUROPEAN
STANDARD
SINGLE 5V SUPPLY
DIP28 AND PLCC44 PACKAGE
HCMOS3A SGS-THOMSON ADVANCED
1.2
碌
m DOUBLE-METAL CMOS PROCESS
ROUND TRIP DELAY MEASUREMENT
EXTENDED TEMPERATURE RANGE (-40擄C
TO +70擄C)
PLCC44
ORDERING NUMBER:
STLC5412FN
TRANSMISSION FEATURES
160 KBIT/S FULL DUPLEX TRANSCEIVER
2B1Q LINE CODING WITH SCRAMBLER/DE-
SCRAMBLER
SUPPORTS BRIDGE TAPS, SPLICES AND
MIXED GAUGES
>70DB ADAPTIVE ECHO-CANCELLATION
ON CHIP HYBRID CIRCUIT
DECISION FEEDBACK EQUALIZATION
ON CHIP ANALOG VCO SYSTEM
DIRECT CONNECTION TO SMALL LINE
TRANSFORMER
Plastic DIP28
ORDERING NUMBER:
STLC5412P
SYSTEM FEATURES
ACTIVATION/DEACTIVATION CONTROLLER
ON CHIP CRC CALCULATION AND VERIFI-
CATION INCLUDING TWO PROGRAMMA-
BLE BLOCK ERROR COUNTERS
EOC CHANNEL AND OVERHEAD-BITS
TRANSMISSION WITH AUTOMATIC MES-
SAGE CHECKING
GCI AND
碌W/DSI
MODULE INTERFACES
COMPATIBLE
DIGITAL LOOPBACKS
COMPLETE (2B+D) ANALOG LOOPBACK IN LT
ELASTIC DATA BUFFERS AND BACKPLANE
CLOCK DE-JITTERIZER
AUTOMODE NT1 AND REPEATER
鈥漊 ACTIVATION ONLY鈥?IN NT1
February 1999
IDENTIFICATIONCODE AS PERGCISTANDARD
DECT FRAME SYNCHRONIZATION
EASILY INTERFACEABLE WITH ST5451
(HDLC & GCI CONTROLLER), STLC5464 /
STLC5465 AND ANY OTHER GCI, IDL or
TDM COMPATIBLE DEVICES
1/74
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.

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