AutoStore鈩?/div>
on Power Down
鈥?Automatic
RECALL
on Power Up
鈥?10mA Typical I
CC
at 200ns Cycle Time
鈥?Unlimited READ, WRITE and
RECALL
Cycles
鈥?1,000,000
STORE
Cycles to EEPROM
鈥?100-Year Data Retention in EEPROM
鈥?Single 5V + 10% Operation
鈥?Not Sensitive to Power On/Off Ramp Rates
鈥?No Data Loss from Undershoot
鈥?Commercial and Industrial Temperatures
鈥?28-Pin DIP and SOIC Packages
DESCRIPTION
The Simtek STK22C48 is a fast static
RAM
with a
nonvolatile, electrically erasable
PROM
element
incorporated in each static memory cell. The
SRAM
can be read and written an unlimited number of
times, while independent, nonvolatile data resides in
EEPROM
. Data transfers from the
SRAM
to the
EEPROM
(the
STORE
operation) can take place
automatically on power down. A 68碌F or larger
capacitor tied from V
CAP
to ground guarantees the
STORE
operation, regardless of power-down slew
rate or loss of power from 鈥渉ot swapping鈥? Transfers
from the
EEPROM
to the
SRAM
(the
RECALL
opera-
tion) take place automatically on restoration of
power. A hardware
STORE
may be initiated with the
HSB pin.
BLOCK DIAGRAM
V
CCX
V
CAP
POWER
CONTROL
PIN CONFIGURATIONS
V
CAP
NC
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
DQ
0
DQ
1
DQ
2
V
SS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
EEPROM ARRAY
32 x 512
A
5
A
6
A
7
A
8
A
9
ROW DECODER
STORE
STATIC RAM
ARRAY
32 x 512
RECALL
STORE/
RECALL
CONTROL
HSB
V
CCX
W
HSB
A
8
A
9
NC
G
A
10
E
DQ
7
DQ
6
DQ
5
DQ
4
DQ
3
28 - 300 PDIP
28 - 600 PDIP
28 - 300 SOIC
28 - 350 SOIC
DQ
DQ
1
DQ
2
DQ
3
DQ
4
DQ
5
DQ
6
DQ
7
INPUT BUFFERS
COLUMN I/O
COLUMN DEC
PIN NAMES
A
0
- A
10
DQ
0
-DQ
7
E
W
Address Inputs
Data In/Out
Chip Enable
Write Enable
Output Enable
Hardware Store Busy (I/O)
Power (+ 5V)
Capacitor
Ground
A
0
A
1
A
2
A
3
A
4
A
10
G
E
W
G
HSB
V
CCX
V
CAP
V
SS
July 1999
3-21