鈥?/div>
RECALL
to SRAM Initiated by Hardware or
Power Restore
鈥?Automatic
STORE
Timing
鈥?10mA Typical I
CC
at 200ns Cycle Time
鈥?Unlimited READ, WRITE and
RECALL
Cycles
鈥?1,000,000
STORE
Cycles to EEPROM
鈥?100-Year Data Retention over Full Industrial
Temperature Range
鈥?Commercial and Industrial Temperatures
鈥?28-Pin 300 mil PDIP, 300 mil SOIC and
350 mil SOIC Packages
DESCRIPTION
The Simtek STK10C48 is a fast static
RAM
with a non-
volatile electrically erasable
PROM
(
EEPROM
) element
incorporated in each static memory cell. The
SRAM
can be read and written an unlimited number of times,
while independent nonvolatile data resides in
EEPROM
. Data may easily be transferred from the
SRAM
to the
EEPROM
(the
STORE
operation), or from
the
EEPROM
to the
SRAM
(the
RECALL
operation),
using the NE pin. Transfers from the
EEPROM
to the
SRAM
(the
RECALL
operation) also take place auto-
matically on restoration of power. The STK10C48
combines the high performance and ease of use of a
fast
SRAM
with nonvolatile data integrity.
The STK10C48 features industry-standard pinout for
nonvolatile
RAM
s.
BLOCK DIAGRAM
EEPROM ARRAY
32 x 512
ROW DECODER
PIN CONFIGURATIONS
NE
NC
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
DQ
0
DQ
1
DQ
2
V
SS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
A
5
A
6
A
7
A
8
A
9
STORE
STATIC RAM
ARRAY
32 x 512
RECALL
V
CC
W
NC
A
8
A
9
NC
G
A
10
E
DQ
7
DQ
6
DQ
5
DQ
4
DQ
3
28 - 300 PDIP
28 - 300 SOIC
28 - 350 SOIC
DQ
0
DQ
1
DQ
2
DQ
3
DQ
4
DQ
5
DQ
6
DQ
7
INPUT BUFFERS
COLUMN I/O
COLUMN DEC
PIN NAMES
STORE/
RECALL
CONTROL
A
0
- A
10
W
DQ
0
- DQ
7
Address Inputs
Write Enable
Data In/Out
Chip Enable
Output Enable
Nonvolatile Enable
Power (+ 5V)
Ground
A
0
A
1
A
2
A
3
A
4
A
10
E
G
NE
E
W
G
NE
V
CC
V
SS
July 1999
3-1