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STD45NF75 Datasheet

  • STD45NF75

  • N-CHANNEL 75V - 0.018 OHM -40A DPAK STripFETTMII POWER MOSFE...

  • 473.96KB

  • 12頁(yè)

  • STMICROELECTRONICS   STMICROELECTRONICS

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STD45NF75
N-CHANNEL 75V - 0.018
鈩?/div>
-40A DPAK
STripFET鈩?II POWER MOSFET
TYPE
STD45NF75
鈻?/div>
鈻?/div>
鈻?/div>
鈻?/div>
V
DSS
75 V
R
DS(on)
<0.024
鈩?/div>
I
D
40 A
(**)
TYPICAL R
DS
(on) = 0.018
鈩?/div>
100% AVALANCHE TESTED
GATE CHARGE MINIMIZED
SURFACE-MOUNTING DPAK (TO-252)
POWER PACKAGE IN TAPE & REEL
(SUFFIX 鈥淭4")
3
1
DPAK
TO-252
(Suffix 鈥淭4鈥?
DESCRIPTION
This Power MOSFET is the latest development of
STMicroelectronis unique "Single Feature Size鈩?quot;
strip-based process. The resulting transistor
shows extremely high packing density for low on-
resistance, rugged avalanche characteristics and
less critical alignment steps therefore a
remarkable manufacturing reproducibility.
APPLICATIONS
鈻?/div>
HIGH CURRENT, SWITCHING
APPLICATIONS
INTERNAL SCHEMATIC DIAGRAM
Ordering Information
SALES TYPE
STD45NF75T4
MARKING
D45NF75
PACKAGE
DPAK
PACKAGING
TAPE & REEL
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Drain-source Voltage (V
GS
= 0)
V
DS
V
DGR
Drain-gate Voltage (R
GS
= 20 k
鈩?/div>
)
V
GS
Gate- source Voltage
I
D
(**)
Drain Current (continuous) at T
C
= 25擄C
I
D
Drain Current (continuous) at T
C
= 100擄C
I
DM
(
鈥?
Drain Current (pulsed)
P
tot
Total Dissipation at T
C
= 25擄C
Derating Factor
Peak Diode Recovery voltage slope
dv/dt
(1)
Single Pulse Avalanche Energy
E
AS (2)
T
stg
Storage Temperature
T
j
Operating Junction Temperature
(
鈥?
Pulse width limited by safe operating area.
(**) Current Limited by Package
Value
75
75
鹵 20
40
30
160
100
0.67
20
500
-55 to 175
Unit
V
V
V
A
A
A
W
W/擄C
V/ns
mJ
擄C
(1) I
SD
鈮?/div>
40A, di/dt
鈮?/div>
800A/碌s, V
DD
鈮?/div>
V
(BR)DSS
, T
j
鈮?/div>
T
JMAX
(2) Starting T
j
= 25
o
C, I
D
= 20 A, V
DD
= 40V
April 2004
1/12

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