Using the latest high voltage MESH OVERLAY鈩?/div>
process, STMicroelectronics has designed an ad-
vanced family of power MOSFETs with outstanding
performance. The new patented STrip layout cou-
pled with the Company鈥檚 proprietary edge termina-
tion structure, makes it suitable in coverters for
lighting applications.
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS
s
CONSUMER
s
LIGHTING
ABSOLUTE MAXIMUM RATINGS
Symbol
V
DS
V
DGR
V
GS
I
D
I
D
I
DM
(1)
P
TOT
T
stg
T
j
Parameter
Drain-source Voltage (V
GS
= 0)
Drain-gate Voltage (R
GS
= 20 k鈩?
Gate- source Voltage
Drain Current (continuous) at T
C
= 25擄C
Drain Current (continuous) at T
C
= 100擄C
Drain Current (pulsed)
Total Dissipation at T
C
= 25擄C
Derating Factor
Storage Temperature
Max. Operating Junction Temperature
Value
250
250
鹵25
3
1.9
12
45
0.36
鈥?50 to 150
150
Unit
V
V
V
A
A
A
W
W/擄C
擄C
擄C
June 2003
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