(on) = 0.015鈩?/div>
OPTIMAL R
DS(on)
x Qg TRADE-OFF
CONDUCTION LOSSES REDUCED
SWITCHING LOSSES REDUCED
THROUGH-HOLE IPAK (TO-251) POWER
PACKAGE IN TUBE (SUFFIX 鈥?1鈥?
SURFACE-MOUNTING DPAK (TO-252)
POWER PACKAGE IN TAPE & REEL
(SUFFIX 鈥淭4鈥?
3
2
1
3
1
DPAK
TO-252
(Suffix 鈥淭4鈥?
IPAK
TO-251
(Suffix 鈥?1鈥?
DESCRIPTION
This application specific Power MOSFET shows the best
trade-off between on-resistance and gate charge. When
used as high and low side in buck regulators, it give the
best performance in terms of both conduction and
switching losses. This is extremely important for
motherboards where fast switching and high efficiency
are of paramount importance.
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS
s
SPECIFICALLY DESIGNED AND OPTIMISED
FOR HIGH EFFICIENCY CPU CORE DC/DC
CONVERTERS
ABSOLUTE MAXIMUM RATINGS
Symbol
V
DS
V
DGR
V
GS
I
D
(鈥?
I
D
I
DM
(鈥⑩€?
P
tot
E
AS (1)
T
stg
T
j
Parameter
Drain-source Voltage (V
GS
= 0)
Drain-gate Voltage (R
GS
= 20 k鈩?
Gate- source Voltage
Drain Current (continuous) at T
C
= 25擄C
Drain Current (continuous) at T
C
= 100擄C
Drain Current (pulsed)
Total Dissipation at T
C
= 25擄C
Derating Factor
Single Pulse Avalanche Energy
Storage Temperature
Max. Operating Junction Temperature
Value
30
30
鹵
18
29
25
116
45
0.3
120
-55 to 175
(1) Starting T
j
= 25
o
C, I
D
= 15 A, V
DD
= 15 V
Unit
V
V
V
A
A
A
W
W/擄C
mJ
擄C
(鈥?
Current limited by the package
(鈥⑩€?
Pulse width limited by safe operating area.
February 2002
.
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