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HIGH EFFICIENCY LOW VOLTAGE
SWITCHING APPLICATIONS
DESCRIPTION
The device is manufactured in NPN Planar
Technology by using a "Base Island" layout.
The resulting Transistor shows exceptional high
gain performance coupled with very low
saturation voltage.
INTERNAL SCHEMATIC DIAGRAM
Table 2: ABSOLUTE MAXIMUM RATINGS
Symbol
V
CBO
V
CEO
V
EBO
I
C
I
CM
I
B
P
tot
T
stg
T
j
Parameter
Collector-Base Voltage (I
E
= 0)
Collector-Emitter Voltage (I
B
= 0)
Emitter-Base Voltage (I
C
= 0)
Collector Current
Collector Peak Current (t
p
< 5 ms)
Base Current
Total Dissipation at T
case
= 25 C
Storage Temperature
Max. Operating Junction Temperature
o
Value
80
60
6
3
6
1
15
-65 to 150
150
Rev. 3
Unit
V
V
V
A
A
A
W
o
o
C
C
July 2004
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