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STA5620TR Datasheet

  • STA5620TR

  • Fully integrated RF front-end for GPS

  • 29頁

  • STMICROELECTRONICS   STMICROELECTRONICS

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STA5620
Fully integrated RF front-end for GPS
Preliminary Data
Features
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Low IF architecture (f
IF
= 4f
O
)
Minimum external components
VGA gain internally regulated
On chip programmable PLL
Typ. 2.7V supply voltage
SPI interface
2kV HBM ESD protected
Compatible with GPS L1
Standard QFN-32 package
Low power for portable designs
The magnitude data is internally integrated in
order to control the variable gain amplifiers in
accordance to the RF input signal strength.
An excellent quality of reception in critical
environments is ensured by the good noise figure
and linearity of the receiver.
The on-chip oscillator supports crystal
frequencies in the range of 10MHz to 40MHz. It is
able to support TCXO providing also a buffered
copy of the oscillator frequency.
The chip, using STMicroelectronics BiCMOS
SiGe technology, is housed in a QFN-32 package.
VFQFPN
-32L
Description
The chip is a fully integrated RF front-end able to
down-convert the GPS L1 signal from
1575.42MHz to 4.092MHz.
The IF signal is converted by a two bit ADC. Sign
(SIGN), Magnitude (MAG) and the 16.368MHz
sampling clock (GPS_CLK) are provided to the
baseband.
Table 1.
Device summary
Marking
STA5620
Order code
STA5620TR
Package
VFQFPN-32L
Packing
Tape & reel
July 2007
Rev 1
1/29
www.st.com
1
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to
change without notice.

STA5620TR 產(chǎn)品屬性

  • 3,000

  • RF/IF 和 RFID

  • RF 接收器

  • -

  • -

  • -

  • -

  • GPS

  • -

  • 19mA

  • PCB，表面貼裝

  • -

  • PCB，表面貼裝

  • -

  • 2.5 V ~ 3.3 V

  • -40°C ~ 85°C

  • 32-VFQFN

  • 32-QFN 裸露焊盤（5x5）

  • 帶卷 (TR)

STA5620TR相關(guān)型號PDF文件下載

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