STA120
DIGITAL AUDIO INTERFACE RECEIVER
s
s
s
s
s
MONOLITHIC CMOS RECEIVER
3.3V SUPPLY VOLTAGE
LOW-JITTER, ON-CHIP CLOCK RECOVERY
256xFs OUTPUT CLOCK PROVIDED
SUPPORTS: AES/EBU, IEC 958, S/PDIF, &
EIAJ CP-340/1201 PROFESSIONAL AND
CONSUMER FORMATS
EXTENSIVE ERROR REPORTING REPEAT
LAST SAMPLE ON ERROR OPTION
SO28
ORDERING NUMBER: STA120D
DESCRIPTION
The STA120 is a monolithic CMOS device that re-
ceives and decodes audio data according to the
AES/EBU, IEC 958, S/PDIF, & EIAJ CP-340/1201
interface standards.
The STA120 recovers the clock and synchroniza-
BLOCK DIAGRAM
tion signals and de-multiplexes the audio and dig-
ital data. Differential or single ended inputs can be
decoded.
The STA120 de-multiplexes the channel, user and
validity data directly to serial output pins with ded-
icated output pins for the most important channel
status bits.
VD+
7
DGND
8
VA+
22
FILT
20
AGND MCK
21
19
M3
17
M2
18
M1
24
M0
23
26
9
RS422
Receiver
CLOCK & DATA
RECOVERY
DE MUX
AUDIO
SERIAL PORT
12
11
SDATA
SCK
FSYNC
RXP
RXN
10
1
REGISTERS
14
28
C
U
VREF
MUX
MUX
13
CS12/FCK
16
SEL
6
5
4
3
2
27
25
ERF
15
CBL
D97AU613A
C0/E0 Ca/E1 Cb/E2 Cc/F0 Cd/F1 Ce/F2
December 2002
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