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ST16C1550CQ48 Datasheet

  • ST16C1550CQ48

  • 2.97V TO 5.5V UART WITH 16-BYTE FIFO

  • 37頁

  • EXAR   EXAR

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謾莽
OCTOBER 2003
ST16C1550/51
2.97V TO 5.5V UART WITH 16-BYTE FIFO
REV. 4.2.0
GENERAL DESCRIPTION
The ST16C1550 and ST16C1551 UARTs (here on
denoted as the ST16C155X) are improved versions
of the SSI 73M1550 and SSI 73M2550 UART with
higher operating speed and lower access time. The
ST16C155X provides enhanced UART functions with
16 byte FIFOs, a modem control interface,
independent programmable baud rate generators
with clock rates up to 1.5 Mbps. Onboard status
registers provide the user with error indications and
operational status. System interrupt and modem
control features may be tailored by external software
to meet specific user requirements. An internal
loopback capability allows onboard diagnostics. The
baud rate generator can be configured for either
crystal or external clock input with the exception of
the 28 pin ST16C1551 package (where an external
clock must be provided). Each package type, with the
exception of the 28 pin ST16C155X, provides a
buffered reset output that can be controlled through
user software. DMA monitor signals TXRDY/RXRDY
are not available at the ST16C155X I/O pins but
these signals are accessible through ISR register bits
4-5. Except as listed above, all package versions
have the same features. The ST16C155X is not
compatible with the industry standard 16550 and will
not work with the standard serial port driver in MS
Windows (see pages 16-17 for details). For an MS
Windows compatible UART, see the ST16C550.
FEATURES
鈥?/div>
Pin and functionally compatible to SSI 73M1550/
2550
鈥?/div>
16 byte Transmit FIFO
鈥?/div>
16 byte Receive FIFO with error flags
鈥?/div>
4 selectable Receive FIFO interrupt trigger levels
鈥?/div>
Modem Control Signals (CTS#, RTS#, DSR#,
DTR#, RI#, CD#)
鈥?/div>
Programmable character lengths (5, 6, 7, 8) with
even, odd or no parity
鈥?/div>
Crystal or external clock input (except 28 pin
ST16C1551, external clock only)
鈥?/div>
1.5 Mbps Transmit/Receive operation (24 MHz)
with programmable clock control
鈥?/div>
Power Down Mode (50 uA at 3.3 V, 200 uA at 5 V)
鈥?/div>
Software controllable reset output
鈥?/div>
2.97 to 5.5 Volt operation
APPLICATIONS
鈥?/div>
Battery Operated Electronics
鈥?/div>
Internet Appliances
鈥?/div>
Handheld Terminal
鈥?/div>
Personal Digital Assistants
鈥?/div>
Cellular Phones DataPort
F
IGURE
1. B
LOCK
D
IAGRAM
16 Byte TX FIFO
A2:A0
D7:D0
IOR#
IOW#
CS#
Data Bus
Interface
DTR#, RTS#
UART
Configuration
Regs
M odem Control Signals
DSR#, CTS#,
CD#, RI#
Transmitter
TX
INT
Receiver
16 Byte RX FIFO
RX
Baud Rate Generator
RESET
RST
XTAL1/CLK
XTAL2
Crystal Osc/Buffer
Exar
Corporation 48720 Kato Road, Fremont CA, 94538
鈥?/div>
(510) 668-7000
鈥?/div>
FAX (510) 668-7017
鈥?/div>
www.exar.com

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