ST10R172L
16-BIT LOW VOLTAGE ROMLESS MCU
PRODUCT PREVIEW
s
High Performance 16-bit CPU
q
q
q
q
q
q
q
q
CPU Frequency: 0 to 50 MHz
40ns instruction cycle time at 50-MHz CPU
clock
4-stage pipeline
Register-based design with multiple
variable register banks
Enhanced boolean bit manipulation
facilities
Additional instructions to support HLL and
operating systems
Single-cycle context switching support
1024 bytes on-Chip special function
register area
1KByte on-chip RAM
Up to 16 MBytes linear address space for
code and data (1 MByte with SSP used)
Programmable external bus characteristics
for different address ranges
8-bit or 16-bit external data bus
Multiplexed or demultiplexed external
address/data buses
Five programmable chip-select signals
Hold and hold-acknowledge bus arbitration
support
Dedicated
pins
O
SC
P.6
P.4
XSSP
P.1
P.0
W
DT
PLL
ST10 CO
RE
DPRAM
Interrupt Controller
&PEC
ASC
P.3
GPT1/2
P.5
PW
M
P.7
Po.2
s
Memory Organisation
q
q
q
s
External Memory Interface
q
q
Two multi-functional general purpose timer
units with 5 timers
Clock Generation via on-chip PLL, or via
direct or prescaled clock input
Synchronous/asynchronous
High-speed-synchronous serial port SSP
s
Serial Channels
q
q
q
q
q
q
s
s
s
Up to 77 general purpose I/O lines
No bootstrap loader
Electrical Characteristics
q
q
s
s
One Channel PWM Unit
Fail Safe Protection
q
q
Programmable watchdog timer
Oscillator Watchdog
s
q
q
5V Tolerant I/Os
5V Fail-Safe Inputs (Port 5)
Power: 3.3 Volt +/-0.3V
Idle and power down modes
C-compilers, macro-assembler packages,
emulators, evaluation boards, HLL-
debuggers, simulators, logic analyser
disassemblers, programming boards
100-Pin Thin Quad Flat Pack (TQFP)
Rev. 1.1
s
Interrupt
q
Support
q
q
8-channel interrupt-driven single-cycle data
transfer facilities via peripheral event
controller (PEC)
16-priority-level interrupt system with 17
sources, sample-rate down to 40 ns
s
s
Timers
Package
q
April 2000
This is preliminary information on a new product now in development. Details are subject to change without notice.
1/68
1