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ST10C167-Q3/XX Datasheet

  • ST10C167-Q3/XX

  • 16-BIT MCU WITH 32K BYTE ROM

  • 65頁

  • STMICROELECTRONICS   STMICROELECTRONICS

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ST10C167
16-BIT MCU WITH 32K BYTE ROM
s
HIGH PERFORMANCE CPU
鈥?16-BIT CPU WITH 4-STAGE PIPELINE
鈥?80ns INSTRUCTION CYCLE TIME @ 25MHz CLK
鈥?400ns 16 X 16-BIT MULTIPLICATION
鈥?800ns 32 / 16-BIT DIVISION
鈥?ENHANCE D BOOLEAN BIT MANIPULATION
FACILITIES
鈥?ADDITIONAL INSTRUCTIONS TO SUPPOR T HLL
AND OPERATING SYSTEMS
鈥?SINGLE-CYCL E CONT EXT SWITCHING SUPPORT
MEMORY ORGANIZATION
鈥?32K BYTE ON-CHIP ROM MEMORY
鈥?UP TO 16M BYTE LINEAR ADDRESS SPACE FOR
CODE AND DATA (5M BYTE WITH CAN)
鈥?2K BYTE ON-CHIP INTERNAL RAM (IRAM)
鈥?2K BYTE ON-CHIP EXTENSION RAM (XRAM)
FAST AND FLEXIBLE BUS
鈥?PROGRAMMABLE
EXTERNAL
BUS
CHARA CTERISTICS FOR DIFFERENT ADDRESS
RANGES
鈥?8-BIT OR 16-BIT EXTERNAL DATA BUS
鈥?MULTIPLEXED OR DEMULTIPLEXED EXTERNAL
ADDRE SS/DATA BUSES
鈥?FIVE PROGRAMMABLE CHIP-SELECT SIGNALS
鈥?HOLD-ACKNOWLEDGE
BUS
ARBITRATION
SUPPORT
INTERRUPT
鈥?8-CHANNEL PERIPHERAL EVENT CONTROLLER
FOR SINGLE CYCLE, INTERRUPT DRIVEN DATA
TRANSFER
鈥?16-PRIORITY-LEVEL INTERRUPT SYSTE M WITH
56 SOURCES, SAMPLE-RATE DOWN TO 40ns
TIMERS
鈥?TWO MULTI-FUNCTIONAL GENERAL PURPOSE
TIMER UNITS WITH 5 TIMERS
鈥?TWO 16-CHANNEL CAPTURE/COMPARE UNITS
A/D CONVERTER
鈥?16-CHANNEL 10-BIT
鈥?7.76碌s CONVERSION TIME
FAIL-SAFE PROTECTION
鈥?PROGRAMMABLE WATCHDOG TIMER
鈥?OSCILLATOR WATCHDOG
ON-CHIP CAN 2.0B INTERFACE
ON-CHIP BOOTSTRAP LOADER
CLOCK GENERATION
鈥?ON-CHIP PLL
鈥?DIRECT OR PRESCALE D CLOCK INPUT
s
PQFP144 (28 x 28 mm)
(Plastic Quad Flat Pack)
s
s
s
s
s
s
s
s
UP TO 111 GENERAL PURPOSE I/O LINES
鈥?INDIVIDUALLY PROGRAMMABLE AS INPUT,
OUTPUT OR SPECIA L FUNCTION
鈥?PROGRAMMABLE DRIVE STRENGTH
鈥?PROGRAMMABLE THRESHOLD (HYSTERESIS)
IDLE AND POWER DOWN MODES
鈥?IDLE CURRENT <95mA
鈥?POWER-DOWN SUPPLY CURRENT <400碌A
4-CHANNEL PWM UNIT
SERIAL CHANNELS
鈥?SYNCHRONOUS/ASYN CSERIAL CHANNEL
鈥?HIGH-SPEED SYNCHRON OUS CHANNEL
DEVELOPMENT SUPPORT
鈥?C-COM PILERS, MACRO-ASSEMBLER PACKAGES,
EMULATORS, EVAL BOARDS, HLL-D EBUGGERS,
SIMULATORS, LOGIC ANALYZER DISASSEM-
BLERS, PROGRAMMING BOARDS
144-PIN PQFP PACKAGE
16
s
32K
Byte
ROM
32
CPU-Core
16
Internal
RAM
16
PEC
Watchdog
XRAM
16
s
s
s
s
s
Interrupt Controller
CAN
16
OSC.
Port 4 Port 1 Port 0
GPT1
External Bus
Controller
ASC usart
10-Bit ADC
SSC
16
CAPCOM2
CAPCOM1
PWM
16
GPT2
Port 2
16
8
8
BR G
Port 3
15
BR G
Port 7
8
Port 8
Port 6
8
Port 5
16
August 1999
This is advance information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
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