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SST88VP1107-80-5W-LBSE Datasheet

  • SST88VP1107-80-5W-LBSE

  • All-in-OneMemory

  • 14頁(yè)

  • SST   SST

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All-in-OneMemory
SST88VP1107
SST79LF008 Notebook System Controller with 8 Mbit LPC Firmware Flash
Fact Sheet
FEATURES:
鈥?All-in-OneMemory: Managed Memory Sub-
system for Code and Data in a Single Package
鈥?Execute-in-place (XIP) Non-volatile area
- NOR area
- Pseudo-NOR鈩?(PNOR鈩? area
- High-speed Pseudo-NOR (High-speed PNOR)
area
鈥?RAM area
鈥?Memory-mapped ATA (mATA) NAND Disk area
鈥?Factory Default Memory Configuration
鈥?NOR - 512 KByte (fixed)
鈥?High-speed PNOR - 128 KByte (re-configurable)
鈥?PNOR - 128 MByte (re-configurable)
鈥?RAM - 12 MByte (re-configurable)
鈥?mATA - 120 MByte (re-configurable)
鈥?Simple Host Interface
鈥?Standard PSRAM interface for all areas
鈥?16-bit Bus with required WAIT function
鈥?Asynchronous/Synchronous Single-access
Read/Write cycles
鈥?Synchronous operation up to 80MHz
鈥?Page Mode and Burst Mode support in High-
speed PNOR, PNOR, and RAM areas
鈥?Burst length up to 32 Words
鈥?4Mbit Built-in SST SuperFlash
廬
鈥?Standard NOR bus interface and operation
鈥?Fast erase and program with SuperFlash
鈥?Immediately available upon power-up
鈥?Active in the deep power-down mode
鈥?Configurable High-speed PNOR and PNOR
鈥?Full address range XIP emulated by using RAM
as cache and NAND as non-volatile storage
鈥?/div>
Configurable memory area size
to optimize
NAND usage for code and data storage
鈥?Built-in cache controller provides cache coher-
ence without host intervention
鈥?Configurable cache size for optimum perfor-
mance and RAM usage
鈥?Dynamic Paging for optimum memory usage and
Static Paging for minimum access latency
鈥?Built-in NAND controller provides Flash File
System (FFS) without host intervention
鈥?Standard PSRAM
鈥?Up to 8 MWord (128Mbit) of RAM for host
鈥?Memory-Mapped ATA (mATA) NAND Disk Area
鈥?Up to 2 Gbit of data storage for host
鈥?Standard ATA protocol with bus cycles decoded
on memory space
鈥?Built-in NAND controller performs NAND Disk
function
鈥?Fast Asynchronous Access Time
鈥?NOR: 50 ns
鈥?High-speed PNOR: 90 ns initial, 30 ns page access
鈥?PNOR: 150 ns initial, 55 ns page access
鈥?RAM: 130 ns initial, 55 ns page access
鈥?mATA: 70 ns
鈥?Read/Write Performance
鈥?NOR:
- Read: 40 MBytes/sec, Write: 200 KBytes/sec
鈥?High-speed PNOR (cache-hit):
- Read: 140 MBytes/sec, Write: 145 MBytes/sec
鈥?PNOR (cache-hit):
- Read:120 MBytes/sec, Write:130 MBytes/sec
鈥?RAM:
- Read:120 MBytes/sec, Write: 130 MBytes/sec
鈥?mATA:
- Read: 22 MBytes/sec, Write: 7 MBytes/sec
鈥?Protection and Security in NOR Area
鈥?Secure Boot capability
鈥?256 Word unique ID for enhanced security
鈥?32 KWord hardware bottom boot block protection
鈥?Two 32 KWord One Time Programmable (OTP)
protected areas
鈥?64-bit password protection
鈥?Superior NAND Flash Management
鈥?Superior data integrity through robust hardware ECC
- Corrects random bit errors for SLC and MLC
NAND
鈥?Built-in Microcontroller with intelligent firmware
- Flash File System in embedded SuperFlash
- Periodic Refresh to ensure NAND data integrity
- Wear-leveling to prolong product life
- Multi-tasking technology to boost NAND flash
performance
鈥?Efficient Power Management Unit
鈥?Immediate disabling of unused circuitry
鈥?Fast boot time from power-down
鈥?Low Power Consumption
鈥?Active Mode current: 75 mA (typical)
鈥?Stand-by Mode curent: 500 碌A(chǔ) (typical)
鈥?Deep Power-down mode current: 300 碌A(chǔ) (typical)
鈥?1.8V and 3.0V Power Supplies
鈥?Host Interface Voltage Selection Through V
DDQ
鈥?1.8V or 3.0V
鈥?Temperature Range
鈥?0擄 to +70擄C for commercial operation
鈥?-25擄C to +85擄C for wireless operation
鈥?Package Available
鈥?80-Ball Low-Profile Ball Grid Array (LBGA) 10x13mm
鈥?All non-Pb (lead-free) devices are RoHS Compliant
漏2007 Silicon Storage Technology, Inc.
S71354(01)-00-000
07/07
1
The SST logo, SuperFlash, and FlashFlex are registered trademarks of Silicon Storage Technology, Inc.
These specifications are subject to change without notice.

SST88VP1107-80-5W-LBSE 產(chǎn)品屬性

  • Microchip

  • 組合存儲(chǔ)器

  • Tray

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