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SST39VF160-70-4C-EK Datasheet

  • SST39VF160-70-4C-EK

  • 16 Megabit (1M x 16-Bit) Multi-Purpose Flash

  • 23頁

  • SST   SST

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16 Megabit (1M x 16-Bit) Multi-Purpose Flash
SST39VF160Q / SST39VF160
Advance Information
FEATURES:
鈥?Organized as 1 M X 16
鈥?Single 2.7V-only Read and Write Operations
鈥?V
DDQ
Power Supply to Support 5V I/O
for SST39VF160Q
- V
DDQ
not available on SST39VF160
鈥?Superior Reliability
- Endurance: 100,000 Cycles (typical)
- Greater than 100 years Data Retention
鈥?Low Power Consumption:
- Active Current: 15 mA (typical)
- Standby Current: 3 碌A(chǔ) (typical)
- Auto Low Power Mode: 3 碌A(chǔ) (typical)
鈥?Small Sector Erase Capability (512 sectors)
- Uniform 2 KWord sectors
鈥?Block Erase Capability (32 blocks)
- Uniform 32 KWord blocks
鈥?Fast Read Access Time:
- 70 and 90 ns
PRODUCT DESCRIPTION
The SST39VF160Q/VF160 devices are 1M x 16 CMOS
Multi-Purpose Flash (MPF) manufactured with SST鈥檚
proprietary, high performance CMOS SuperFlash tech-
nology. The split-gate cell design and thick oxide tunnel-
ing injector attain better reliability and manufacturability
compared with alternate approaches. The
SST39VF160Q/VF160 write (Program or Erase) with a
2.7V-only power supply. The SST39VF160Q/VF160
conform to JEDEC standard pinouts for x16 memories.
Featuring high performance word program, the
SST39VF160Q/VF160 devices provide a maximum
word-program time of 10 碌sec. The entire memory can
typically be erased and programmed word by word in 7
seconds, when using interface features such as Toggle
Bit or Data# Polling to indicate the completion of Program
operation. To protect against inadvertent write, the
SST39VF160Q/VF160 have on-chip hardware and soft-
ware data protection schemes. Designed, manufac-
tured, and tested for a wide spectrum of applications, the
SST39VF160Q/VF160 are offered with a guaranteed
endurance of 10,000 cycles. Data retention is rated at
greater than 100 years.
The SST39VF160Q/VF160 devices are suited for appli-
cations that require convenient and economical updating
of program, configuration, or data memory. For all sys-
tem applications, the SST39VF160Q/VF160 signifi-
cantly improve performance and reliability, while lower-
ing power consumption. The SST39VF160Q/VF160 in-
herently use less energy during Ease and Program than
鈥?Latched Address and Data
鈥?Fast Sector Erase and Word Program:
- Sector Erase Time: 3 ms typical
- Block Erase Time: 7 ms typical
- Chip Erase Time: 15 ms typical
- Word Program time: 7 碌s typical
- Chip Rewrite Time: 7 seconds
鈥?Automatic Write Timing
- Internal V
pp
Generation
鈥?End of Write Detection
- Toggle Bit
- Data# Polling
鈥?CMOS I/O Compatibility
鈥?JEDEC Standard
-
EEPROM Pinouts and command set
鈥?Packages Available
- 48-Pin TSOP (12mm x 20mm)
- 6 x 8 Ball TFBGA
alternative flash technologies. The total energy con-
sumed is a function of the applied voltage, current, and
time of application. Since for any given voltage range, the
SuperFlash technology uses less current to program and
has a shorter erase time, the total energy consumed
during any Erase or Program operation is less than
alternative flash technologies. The SST39VF160Q/
VF160 also improve flexibility while lowering the cost for
program, data, and configuration storage applications.
The SuperFlash technology provides fixed Erase and
Program times, independent of the number of endurance
cycles that have occurred. Therefore the system
software or hardware does not have to be modified or
de-rated as is necessary with alternative flash technolo-
gies, whose erase and program times increase with
accumulated endurance cycles.
To meet high density, surface mount requirements, the
SST39VF160Q/VF160 are offered in 48-pin TSOP and
48-pin TFBGA packages. See Figures 1 and 2 for
pinouts.
Device Operation
Commands are used to initiate the memory operation
functions of the device. Commands are written to the
device using standard microprocessor write sequences.
A command is written by asserting WE# low while
keeping CE# low. The address bus is latched on the
falling edge of WE# or CE#, whichever occurs last. The
data bus is latched on the rising edge of WE# or CE#,
whichever occurs first.
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漏 1998 Silicon Storage Technology, Inc. The SST logo and SuperFlash are registered trademarks of Silicon Storage Technology, Inc. MPF is a trademark of Silicon storage Technology, Inc.
329-09 11/98
These specifications are subject to change without notice.
1

SST39VF160-70-4C-EK 產(chǎn)品屬性

  • Microchip

  • 閃存

  • 16 bit

  • NOR

  • 16 Mbit

  • Sectored

  • CFI

  • 70 ns

  • 3.6 V

  • 2.7 V

  • 20 mA

  • + 70 C

  • SMD/SMT

  • TSOP-48

  • Tray

  • 1 MB x 8

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