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SST39SF010-90-4C-PH Datasheet

  • SST39SF010-90-4C-PH

  • 512 Kbit / 1 Mbit (x8) Multi-Purpose Flash

  • 22頁

  • SST   SST

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512 Kbit / 1 Mbit (x8) Multi-Purpose Flash
SST39SF512 / SST39SF010
SST39SF512 / 0105.0V 512Kb / 1Mb (x8) MPF memories
Data Sheet
FEATURES:
鈥?Organized as 64K x8 / 128K x8
鈥?Single 5.0V Read and Write Operations
鈥?Superior Reliability
鈥?Endurance: 100,000 Cycles (typical)
鈥?Greater than 100 years Data Retention
鈥?Low Power Consumption:
鈥?Active Current: 20 mA (typical)
鈥?Standby Current: 10 碌A(chǔ) (typical)
鈥?Sector-Erase Capability
鈥?Uniform 4 KByte sectors
鈥?Fast Read Access Time:
鈥?70 ns
鈥?90 ns
鈥?Latched Address and Data
鈥?Fast Erase and Byte-Program:
鈥?Sector-Erase Time: 7 ms (typical)
鈥?Chip-Erase Time: 15 ms (typical)
鈥?Byte-Program Time: 20 碌s (typical)
鈥?Chip Rewrite Time:
2 seconds (typical) for SST39SF512
3 seconds (typical) for SST39SF010
鈥?Automatic Write Timing
鈥?Internal V
PP
Generation
鈥?End-of-Write Detection
鈥?Toggle Bit
鈥?Data# Polling
鈥?TTL I/O Compatibility
鈥?JEDEC Standard
鈥?Flash EEPROM Pinouts and command sets
鈥?Packages Available
鈥?32-pin PLCC
鈥?32-pin TSOP (8mm x 14mm)
鈥?32-pin PDIP
PRODUCT DESCRIPTION
The SST39SF512/010 are CMOS Multi-Purpose Flash
(MPF) manufactured with SST鈥檚 proprietary, high perfor-
mance CMOS SuperFlash technology. The split-gate cell
design and thick oxide tunneling injector attain better reli-
ability and manufacturability compared with alternate
approaches. The SST39SF512/010 devices write (Pro-
gram or Erase) with a 5.0V-only power supply. The
SST39SF512/010 device conforms to JEDEC standard
pinouts for x8 memories.
Featuring high performance Byte-Program, the
SST39SF512/010 devices provide a maximum Byte-Pro-
gram time of 30 碌sec. These devices use Toggle Bit or
Data# Polling to indicate the completion of Program opera-
tion. To protect against inadvertent write, they have on-chip
hardware and Software Data Protection schemes.
Designed, manufactured, and tested for a wide spectrum of
applications, these devices are offered with a guaranteed
endurance of 10,000 cycles. Data retention is rated at
greater than 100 years.
The SST39SF512/010 devices are suited for applications
that require convenient and economical updating of pro-
gram, configuration, or data memory. For all system appli-
cations, they significantly improve performance and
reliability, while lowering power consumption. They inher-
ently use less energy during erase and program than alter-
native flash technologies. The total energy consumed is a
function of the applied voltage, current, and time of applica-
tion. Since for any given voltage range, the SuperFlash
technology uses less current to program and has a shorter
erase time, the total energy consumed during any Erase or
Program operation is less than alternative flash technolo-
gies. These devices also improve flexibility while lowering
the cost for program, data, and configuration storage appli-
cations.
The SuperFlash technology provides fixed Erase and Pro-
gram times, independent of the number of Erase/Program
cycles that have occurred. Therefore the system software
or hardware does not have to be modified or de-rated as is
necessary with alternative flash technologies, whose Erase
and Program times increase with accumulated Erase/Pro-
gram cycles.
To meet high density, surface mount requirements, the
SST39SF512/010 are offered in 32-pin PLCC packages,
32-pin TSOP and a 600 mil, 32-pin PDIP is also available.
,
See Figures 1, 2, and 3 for pinouts.
Device Operation
Commands are used to initiate the memory operation func-
tions of the device. Commands are written to the device
using standard microprocessor write sequences. A com-
mand is written by asserting WE# low while keeping CE#
漏2001 Silicon Storage Technology, Inc.
S71149-03-000 4/01
394
1
The SST logo and SuperFlash are registered trademarks of Silicon Storage Technology, Inc.
MPF is a trademark of Silicon Storage Technology, Inc.
These specifications are subject to change without notice.

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