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SPT7853SCT Datasheet

  • SPT7853SCT

  • TRIPLE 10-BIT, 30 MSPS A/D CONVERTER

  • 10頁

  • FAIRCHILD

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SPT7853
TRIPLE 10-BIT, 30 MSPS A/D CONVERTER
FEATURES
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Three 10-bit, 30 MSPS ADCs on one chip
SINAD of 54.5 dB @ 茠
IN
= 3.58 MHz
Channel-to-channel cross talk: 鈥?6 dB typical
Channel-to-channel gain matching of <0.1 dB
Single 2X sample rate clock
Total power dissipation: 580 mW (typical)
Tri-state +3 V to +5 V digital outputs CMOS-compatible
Single +5 V power supply
APPLICATIONS
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CCIR-601 (4:2:2/4:4:4) digital component video
RGB video decoding
Medical imaging
Flat panel displays
PC projectors
GENERAL DESCRIPTION
The SPT7853 has three 10-bit analog-to-digital converters
on one CMOS chip, each with a sample rate of 30 MSPS.
This device is ideal for professional-level video decoding to
4:2:2/4:4:4 CCIR-601 standard specifications for compo-
nent digital video, including YCrCb and RGB decoding, pro-
fessional video equipment, video frame grabbers, medical
imaging, flat panel display and projection applications.
The SPT7853 offers significant advantages over discrete
single-channel A/D implementations. Board area, package
count, system cost and power dissipation can greatly be
reduced by using a single SPT7853 device. In addition,
several performance advantages exist, including low chan-
nel-to-channel cross-talk noise and well matched channel-
to-channel gain specifications. The three analog-to-digital
converters are driven from a common 2X sample rate
CMOS clock.
The SPT7853 typically consumes only 580 mW of total
power from a single +5 V supply. Digital outputs can operate
with +3 V or +5 V logic and are tri-state capable. The
SPT7853 is offered in a small 52-pin thin quad flat pack
(TQFP) package and operates over the 0 to +70
擄C
com-
mercial temperature range.
BLOCK DIAGRAM
V
RH
Force/Sense
V
RL
Force/Sense
2
2
Reference
Ladder
10
Output
Buffer
V
IN
A
T/H
ADC
A
DA0鈥?
V
IN
B
T/H
ADC
B
10
Output
Buffer
DB0鈥?
V
IN
C
T/H
ADC
C
Timing
Generation
10
Output
Buffer
DC0鈥?
Clock
DAV
Output Enable

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