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SPT7721SIT Datasheet

  • SPT7721SIT

  • 8-BIT, 250 MSPS ADC WITH DEMUXED OUTPUTS

  • 11頁

  • FAIRCHILD

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SPT7721
8-BIT, 250 MSPS ADC WITH DEMUXED OUTPUTS
TECHNICAL DATA
NOVEMBER 8, 2001
FEATURES
TTL/CMOS/PECL compatible
High conversion rate: 250 MSPS
Single +5 V power supply
Very low power dissipation: 310 mW
Power-down mode
+3.0 V/+5.0 V (LVCMOS) digital output logic
compatibility
鈥?Demuxed output ports
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
APPLICATIONS
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
RGB video processing
Digital communications
High-speed instrumentation
Projection display systems
GENERAL DESCRIPTION
The SPT7721 is a high-speed, 8-bit analog-to-digital con-
verter implemented in an advanced BiCMOS process. An
advanced folding and interpolating architecture provides
both a high conversion rate and very low power dissipation
of only 310 mW. The analog inputs can be operated in
either single-ended or differential input mode. A 2.5 V com-
mon mode reference is provided on chip for the single-
ended input mode to minimize external components.
The SPT7721 digital outputs are demuxed (double-wide)
with both dual-channel and single-channel selectable out-
put modes. Demuxed mode supports either parallel
aligned or interleaved data output. The output logic is both
+3.0 V and +5.0 V compatible. The SPT7721 is available in
a 44-lead TQFP surface mount package over the industrial
temperature range of 鈥?0 to +85 擄C.
BLOCK DIAGRAM
AGND
DGND
AV
CC
OV
DD
V
IN
+
V
IN
聳
8-Bit
250 MSPS
ADC
CLK
CLK
Data Output Latches
DA
0
聳DA
7
DB
0
聳DB
7
Common Mode
Voltage
Reference
Data Output
Mode Control
2
2
DCLK
OUT
DCLK
OUT
+2.5 V
V
CM
PD
CLK CLK
Reset DMODE
1,2
&
Reset

SPT7721SIT 產(chǎn)品屬性

  • Fairchild Semiconductor

  • Differential

  • 1

  • 1

  • 250000 KSPs

  • 8 bit

  • 3-Step Folding

  • +/- 0.235 V

  • Parallel

  • 43 dB

  • Internal

  • 5.25 V

  • 4.75 V

  • 350 mW

  • + 85 C

  • - 40 C

  • TQFP-44

  • SMD/SMT

  • 310 mW

  • Yes

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