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SPT5420SIM Datasheet

  • SPT5420SIM

  • 13-BIT, OCTAL D/A CONVERTER

  • 8頁

  • FAIRCHILD

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SPT5420
13-BIT, OCTAL D/A CONVERTER
TECHNICAL DATA
JUNE 26, 2001
FEATURES
鈥?/div>
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鈥?/div>
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鈥?/div>
鈥?/div>
鈥?/div>
13-bit resolution
Pin compatible with AD7839
Eight DACs in one package
Buffered voltage outputs
Wide output voltage swing V
DD
鈥?.5 V to V
SS
+2.5 V
15 碌s settling time to 鹵0.5 LSB
Double-buffered digital inputs
Microprocessor and TTL/CMOS compatible
APPLICATIONS
鈥?Automatic test equipment
鈥?Instrumentation
鈥?Process control
GENERAL DESCRIPTION
The SPT5420 contains eight 13-bit digital-to-analog
CMOS converters designed primarily for automatic test
equipment applications. It uses novel circuit topology to
convert the 13-bit digital inputs into output voltages which
are proportionate to the applied reference voltages. Each
DAC鈥檚 full-scale output voltage and output voltage offset
are adjustable with analog inputs (RGND, V
REFB
, V
REFT
).
The SPT5420 operates over an industrial temperature
range of 鈥?0 擄C to +85 擄C and is available in a 10 x 10 mm,
44-lead metric quad flat pack (MQFP) plastic package.
BLOCK DIAGRAM
V
REFT01
V
REFB01
RGND
23
RGND
01
13
D
0A
LEA0
13
D
Q
LE
D
LDAC
D
LDAC
0B
Q
LE
13
DAC0
-
-
+
VOUT0
Q
1A
LE
LEA1
Q
1B
LE
13
DAC1
+
VOUT1
13
D
2A
LEA2
13
D0聳D12
13
D
Q
LE
D
LDAC
D
LDAC
D
LDAC
2B
Q
LE
13
-
DAC2
+
VOUT2
Q
3A
LE
LEA3
Q
3B
LE
13
-
DAC3
+
VOUT3
WR
CS
A0聳A2
LDAC
Control
8
Logic
LEA0聳LEA7
LDAC
13
LEA4
D
LEA5
13
LDAC
13
LEA6
13
D
LDAC
Q
LE
D
LDAC
7B
LEA7
V
REFT2345
V
REFB2345
V
REFT67
V
REFB67
CLR
RGND
45
RGND
67
-
7A
Q
LE
DAC7
+
13
-
D
6A
Q
LE
D
6B
Q
LE
DAC6
+
-
5A
5B
+
Q
LE
D
Q
LE
13
DAC5
-
4A
4B
+
13
D
Q
LE
Q
LE
13
DAC4
VOUT4
VOUT5
VOUT6
VOUT7

SPT5420SIM 產(chǎn)品屬性

  • Fairchild Semiconductor

  • 8

  • 13 bit

  • Parallel

  • + 85 C

  • SMD/SMT

  • MQFP

  • - 40 C

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