鈥?/div>
The SP8715 is a switchable divide by 64/65, 128/129
programmable divider which is guaranteed to operate up
to 1100MHz. It will operate from a supply of 2.7V to 5.25V
and requires typically 3.6mA (including the output current).
It also features a power down facility for battery economy.
The RF inputs are internally biased and should be
capacitively coupled to the signal source. The output is
designed to interface with CMOS synthesisers.
ESD precautions must be observed
V
CK
6
MC
D
2
Q
CC
D TYPE
BIAS
7
POWER
DOWN
3
RS
V
CC
250K
5
V
EE
CONTROL
LOGIC
NOMINAL
RF
INPUT
(CLOCK)
1
DIVIDE BY
4/5
8
V
DIVIDE BY
16 / 32
4
OUTPUT
EE
Figure 1 Block Diagram
1