SP7655
Evaluation Board Manual
Easy Evaluation for the
SP7655ER 24V Input, 0 to 8A
Output Synchronous Buck
Converter
Built in Low Rds(on) Power FETs
UVLO Detects Both VCC and VIN
High Integrated Design, Minimal
Components
High Efficiency: 85%
Feature Rich: UVIN, Programmable
Softstart, External VCC Supply and
Output Dead Short Circuit Shutdown
SP7655EB SCHEMATIC
U1
SP7655
1
PGND
PGND
PGND
GND
VFB
COMP
UVIN
GND
SS
VIN
VIN
VIN
VIN
LX
LX
LX
LX
VCC
GND
GND
GND
BST
NC
LX
LX
LX
26
25
24
23
22
21
20
19
18
17
16
15
14
2
3
4
5
6
7
8
9
L1 IHLP-2525CZ-01-2R2MTR
2.2uH, Irate=8A
DCR=10.4mOhm
C3
47uF
6.3V
CVCC
2.2uF
DBST
SD101AWS
CBST
1uF
CZ2
RZ2
2,200pF 7.68k,1%
CP1
15pF
fs=300Khz
RZ3
8.66k,1%
CZ3
120pF
VOUT
3.30V
0-8A
R1
68.1k,1%
CF1
100pF
GND2
C3
CERAMIC
1210
X5R
R2
21.5k,1%
CSS
47nF
10
11
12
VIN
24V
C1,C4
CERAMIC
1210
Y5V
C1
3.3uF
50V
C4
3.3uF
50V
13
R3
499k,1%
D1
1
U2
SPX5205
VIN VOUT
GND
EN
BYP
4
5
2
3
Notes:
U1 Bottom-Side Layout should
hhree Contacts which
t
isolated from one of another,
QTQB Drain Contact
&
d
Controller GND
C tresistor & capacitor
t
All
i
0603 unless other wise
MMSZ4678T1
Vz=12V
R4
100k,1%
C2
0.1uF
GND
Date: 2/01/05
SP7655 Evaluation Manual
Copyright 2004 Sipex Corporation