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SP5769AKGQP1T Datasheet

  • SP5769AKGQP1T

  • 3GHz I2C Bus Synthesiser

  • 11頁

  • MITEL

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SP5769
3GHz I
2
C Bus Synthesiser
Preliminary information
DS4878 Issue 4.0 October 1999
Features
G
Complete 3路0 GHz Single Chip System
G
Optimised for Low Phase Noise, with Comparison
G
G
G
G
G
G
G
G
G
G
G
Ordering Information
SP5769A/KG/MP1S (Tubes)
SP5769A/KG/MP1T (Tape and Reel)
SP5769A/KG/QP1S (Tubes)
SP5769A/KG/QP1T (Tape and Reel)
size equal to the loop comparison frequency and no
prescaler phase noise degradation over the full RF
operating range. The comparison frequency is obtained
either from an on-chip crystal controlled oscillator, or from
an external source. The oscillator frequency, f
REF
, or phase
comparator frequency, f
COMP
, can be switched to the REF/
COMP output providing a reference for a second frequency
synthesiser. The synthesiser is controlled via an 1
2
C bus
Frequencies up to 4 MHz
No RF Prescaler
Selectable Reference Division Ratio
Selectable Reference/Comparison Frequency Output
Selectable Charge Pump Current with 10:1 Ratio
Four Selectable I
2
C Addresses
I
2
C Fast Mode Compliant with 3路3V and 5V Logic Levels
Four Switching Ports
Functional Replacement for SP5659 (except ADC)
Pin Compatible with SP5655
Power Consumption 110mW with V
CC
= 5路5V, all Ports off
ESD Protection 2kV min., MIL-STD-883B Method 3015
Cat.1 (Normal ESD handling procedures should be
observed)
Absolute Maximum Ratings
All voltages are referred to V
EE
= 0V
Supply voltage, V
CC
0路3V to
17V
RF differential input voltage
2路5Vp-p
All I/O port DC offsets
20路3
to V
CC
10路3V
SDA and SCL DC offset
20路3
to 6V
Storage temperature
255擄C
to
1125擄C
Junction temperature
1150擄C
MP16 thermal resistance
Chip to ambient,
胃
JA
80擄C/W
Chip to case,
胃
JC
20擄C/W
Applications
G
Digital Satellite and Cable Tuning Systems
G
Communications Systems
The SP5769 is a single chip frequency synthesiser
designed for tuning systems up to 3GHz. The RF
preamplifier interfaces direct with the RF programmable
divider, which is of MN1A construction so giving a step
11
ENABLE/
SELECT
13
2
REF/COMP
CRYSTAL CAP
RF
INPUT
11-BIT
COUNT
REFERENCE
DIVIDER
3
14
4
16/17
4-BIT
COUNT
LOCK
f
PD
/2
CRYSTAL
CHARGE PUMP
DRIVE
1
PUMP
16
CP TEST
MODE SET
15-BIT LATCH
ADDRESS
SDA
SCL
10
4
5
2 BIT
4 BIT
2 BIT
3 BIT
I
2
C BUS
TRANSCEIVER
4-BIT LATCH AND
PORT INTERFACE
6
7
8
9
f
PD
/2 SELECT
P3
P2
P1
P0
Figure 1 SP5769 block diagram

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