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SP5669KGMP1S Datasheet

  • SP5669KGMP1S

  • 2.7GHz I2C Bus Controlled Synthesiser

  • 240.18KB

  • 15頁

  • MITEL

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SP5669
2.7GHz I
2
C Bus Controlled Synthesiser
Preliminary Information
DS4852 -
Issue 2.1
May 1999
Features
q
q
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q
q
q
q
q
q
Ordering Information
SP5669/KG/MP1S (Tubes)
SP5669/KG/MP1T (Tape and reel)
Complete 2.7GHz single chip system
Compatible with UK DTT offset requirements
Optimised for low phase noise
Selectable divide by two prescaler
Selectable reference division ratio
Selectable reference/comparison frequency output
Selectable charge pump current
Four selectable I
2
C bus address
5鈥搇evel ADC
Pin compatible with the SP5658 3鈥搘ire bus
controlled synthesiser and SP5659 I
2
C bus
synthesiser and SP5659 I
2
C bus synthesiser
ESD protection; (Normal ESD handling
procedures should be observed)
The comparison frequency is obtained either from an
on鈥揷hip crystal controlled oscillator, or from an external
source. The oscillator frequency F
ref
or the comparison
frequency F
comp
may be switched to the REF/COMP
output. This feature is ideally suited to providing the
reference frequency for a second synthesiser such as in
a double conversion tuner (see Fig. 8).
The synthesiser is controlled via an I
2
C bus, and
responds to one of four programmable addresses which
are selected by applying a specific voltage to the
鈥榓ddress鈥?input. This feature enables two or more
synthesisers to be used in a system.
The device contains four switching ports P0鈥揚3 and a
5鈥搇evel ADC. The output of the ADC can be read via the
I
2
C
bus.
The device also contains a varactor line disable and
chargepump disable facility.
Applications
q
q
Complete 2.7GHz single chip system
Optimised for low phase noise
Description
The SP5669 is a single chip frequency synthesiser
designed for tuning systems up to 2.7GHz and offers
step size compatible with DTT offset requirements.
The RF preamplifier drives a divide by two prescaler
which can be disabled for applications up to 2GHz,
allowing direct interfacing with the programmable
divider so enabling a step size equal to the comparison
frequency. For applications up to 2.7GHz the divide by
two is enabled, giving a step size of twice the
comparison frequency.

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