Semiconductor
SD60C31/P, SD60C51/P
CMOS SINGLE-COMPONENT 8-BIT MICROCOMPUTER
Description
The AUK 60C31/P 60C51/P is a high-performance micro controller fabricated with AUK
high-density CMOS technology. The AUK CMOS technology combines the high speed and
density characteristics of MOS with the low power attributes of CMOS.
The 60C51 contains a 4K x 8 ROM, a 128 x 8 RAM, 32 I/O lines, two 16-bit counter/timers,
a five-source, two-priority level nested interrupt structure, a serial I/O port for either multi-
processor communication, I/O expansion or full duplex UART, and on-chip oscillator and
clock circuits.
In addition, the device has two software selectable modes of power reduction idle mode
and power-down mode. The idle mode freezes the CPU while allowing the RAM, timers,
serial port, and interrupt system to continue functioning.
Features
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8-bit CPU optimized for control applications.
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Power control modes.
Pin-to-pin compatible with intel's 80C51/80C31.
60C51 low power mask programmable ROM
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60C31 low power CPU only
64K Program Memory Space, Data Memory space
32K programmable I/O lines.
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Two 16bit timer/counters
High performance CMOS process.
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5 interrupt sources.
2 Level programmable serial port
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3.5 to 12MHz @ 5V 鹵 20%
Ordering Information
Type NO.
SD60C31
SD60C51
Marking
SD60C31
SD60C51
Package Code
PLCC44
PLCC44
Type NO.
SD60C31P
SD60C51P
Marking
SD60C31
SD60C51
Package Code
DIP40
DIP40
Outline Dimensions
40
0 .6 95
0 .6 85
0 .6 56
0 .6 50
(1 7.6 53 )
(1 7.3 99 )
(1 6.6 62 )
(1 6.5 10 )
0.042(1.067) 45
0.048 (1.219)
unit :
21
mm
13.4
鹵
0.2
1 5.24
0.695 (17.653)
0.685 (17.399)
0.656 (16.662)
0.650 (16.510)
1
20
50.7 鹵0. 2
鹵
MIN 0.020 (0.508)
SEATING PLANE
BASE PLANE
0.5 MIN
0 .0 50 (1 .27 0)
4. 5
鹵
0.3
0.180 (4.572)
0.165 (4.191)
0.120 (3.048)
0.090 (2.286)
0 .6 30 (16 .0 02 )
0 .5 90 (14 .9 06 )
1 .2 2T YP
2 .5 4
1. 4
鹵
0. 1
0. 5
鹵
0. 1
PLCC44
DIP40
KSI-W001-000
3.5
鹵
0.3
0.2 5
15 MA
X
o
1
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