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SCAN92LV090VEH Datasheet

  • SCAN92LV090VEH

  • 9 Channel Bus LVDS Transceiver w/ Boundary SCAN

  • 13頁

  • NSC

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SCAN92LV090 9 Channel Bus LVDS Transceiver w/ Boundary SCAN
February 2005
SCAN92LV090
9 Channel Bus LVDS Transceiver w/ Boundary SCAN
General Description
The SCAN92LV090A is one in a series of Bus LVDS trans-
ceivers designed specifically for the high speed, low power
proprietary backplane or cable interfaces. The device oper-
ates from a single 3.3V power supply and includes nine
differential line drivers and nine receivers. To minimize bus
loading, the driver outputs and receiver inputs are internally
connected. The separate I/O of the logic side allows for loop
back support. The device also features a flow through pin out
which allows easy PCB routing for short stubs between its
pins and the connector.
The driver translates 3V TTL levels (single-ended) to differ-
ential Bus LVDS (BLVDS) output levels. This allows for high
speed operation, while consuming minimal power with re-
duced EMI. In addition, the differential signaling provides
common mode noise rejection of
鹵
1V.
The receiver threshold is less than
鹵
100 mV over a
鹵
1V
common mode range and translates the differential Bus
LVDS to standard (TTL/CMOS) levels.
This device is compliant with IEEE 1149.1 Standard Test
Access Port and Boundary Scan Architecture with the incor-
poration of the defined boundary-scan test logic and test
access port consisting of Test Data Input (TDI), Test Data
Out (TDO), Test Mode Select (TMS), Test Clock (TCK), and
the optional Test Reset (TRST).
Features
IEEE 1149.1 (JTAG) Compliant
Bus LVDS Signaling
Low power CMOS design
High Signaling Rate Capability (above 100 Mbps)
0.1V to 2.3V Common Mode Range for V
ID
= 200mV
鹵
100 mV Receiver Sensitivity
Supports open and terminated failsafe on port pins
3.3V operation
Glitch free power up/down (Driver & Receiver disabled)
Light Bus Loading (5 pF typical) per Bus LVDS load
Designed for Double Termination Applications
Balanced Output Impedance
Product offered in 64 pin LQFP package and BGA
package
n
High impedance Bus pins on power off (V
CC
= 0V)
n
n
n
n
n
n
n
n
n
n
n
n
n
Simplified Functional Diagram
10124201
TRI-STATE
廬
is a registered trademark of National Semiconductor Corporation.
漏 2005 National Semiconductor Corporation
DS101242
www.national.com

SCAN92LV090VEH 產(chǎn)品屬性

  • National Semiconductor (TI)

  • 2

  • 2

  • 100 Mbps

  • 3.3 V

  • 1740 mW

  • + 85 C

  • LQFP-64

  • Tray

  • - 40 C

  • SMD/SMT

  • 3.9 ns

  • 3.6 V

  • 3 V

  • LVCMOS, LVTTL, LVDS

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