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SCAN18541T Datasheet

  • SCAN18541T

  • Non-Inverting Line Driver with 3-STATE Outputs

  • 11頁

  • FAIRCHILD

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SCAN18541T Non-Inverting Line Driver with 3-STATE Outputs
October 1991
Revised April 2000
SCAN18541T
Non-Inverting Line Driver with 3-STATE Outputs
General Description
The SCAN18541T is a high speed, low-power line driver
featuring separate data inputs organized into dual 9-bit
bytes with byte-oriented paired output enable control sig-
nals. This device is compliant with IEEE 1149.1 Standard
Test Access Port and Boundary Scan Architecture with the
incorporation of the defined boundary-scan test logic and
test access port consisting of Test Data Input (TDI), Test
Data Out (TDO), Test Mode Select (TMS), and Test Clock
(TCK).
Features
s
IEEE 1149.1 (JTAG) Compliant
s
Dual output enable signals per byte
s
3-STATE outputs for bus-oriented applications
s
9-bit data busses for parity applications
s
Reduced-swing outputs source 32 mA/sink 64 mA
s
Guaranteed to drive 50鈩?transmission line to TTL input
levels of 0.8V and 2.0V
s
TTL compatible inputs
s
25 mil pitch SSOP (Shrink Small Outline Package)
s
Includes CLAMP and HIGHZ instructions
s
Member of Fairchild鈥檚 SCAN Products
Ordering Code:
Order Number
SCAN18541TSSC
Package Number
MS56A
Package Description
56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter 鈥淴鈥?to the ordering code.
Connection Diagram
Pin Names
Pin Names
AI
(0鈥?)
BI
(0鈥?)
Description
Input Pins, A Side
Input Pins, B Side
A Side
B Side
AOE
1
, AOE
2
3-STATE Output Enable Input Pins,
BOE
1
, BOE
2
3-STATE Output Enable Input Pins,
AO
(0鈥?)
AO
(0鈥?)
Output Pins, A Side
Output Pins, B Side
Truth Tables
Inputs
AOE
1
L
H
X
L
AOE
2
L
X
H
L
Inputs
BOE
1
L
H
X
L
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
AI
(0鈥?)
H
X
X
L
AO
(0鈥?)
H
Z
Z
L
BO
(0鈥?)
H
Z
Z
L
BOE
2
L
X
H
L
BI
(0鈥?)
H
X
X
L
X
=
Immaterial
Z
=
High Impedance
漏 2000 Fairchild Semiconductor Corporation
DS010965
www.fairchildsemi.com

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