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SC26L198C1A Datasheet

  • SC26L198C1A

  • Octal UART with TTL compatibility at 3.3V and 5V supply volt...

  • 49頁(yè)

  • PHILIPS

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Philips Semiconductors
Product specification
Octal UART with TTL compatibility at 3.3V
and 5V supply voltages
SC26C198 SC68C198
SC26L198 SC68L198
Table of Contents
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 336
Uses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 337
Register Map Detail . . . . . . . . . . . . . . . . . . . . . . . . 364
Reset Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . 372
Device Configuration after Hardware Reset or CRa cmd=x1F
Cleared registers: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Clears Modes for: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Disables: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Halts: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Limitations: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
372
372
372
372
372
373
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 337
Pin Configurations . . . . . . . . . . . . . . . . . . . . . . . . . 338
Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 338
Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 339
Absolute Maximum Ratings . . . . . . . . . . . . . . . . .
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Functional Description . . . . . . . . . . . . . . . . . . . . .
Conceptual Overview . . . . . . . . . . . . . . . . . . . . . . .
Host Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Asynchronous bus cycle . . . . . . . . . . . . . . . . . . . . . . . . . . .
Synchronous bus cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Timing Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Crystal Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Sclk 鈥?System Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Baud Rate Generator BRG . . . . . . . . . . . . . . . . . . . . . . . .
BRG Counters (Used for random baud rate generation)
Channel Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Character Recognition . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Interrupt Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Global Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I/O Ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
339
340
340
340
340
340
340
341
341
341
341
341
341
341
342
342
342
DC Electrical Specifications
(26C198 and 68C198) . . . . . . . . . . . . . . . . . . . . . . .
DC Electrical Specifications
(26L198 and 68L198) . . . . . . . . . . . . . . . . . . . . . . .
AC Electrical Characteristics5 (26L198 and
68L198) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
INDEX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
373
376
377
383
DESCRIPTION
The Philips 26C198 Octal UART is a single chip CMOS鈥揕SI
communications device that provides 8 full-duplex asynchronous
channels with significantly deeper 16 byte FIFOs, Automatic
in鈥揵and flow control using Xon/Xoff characters defined by the user
and address recognition in the wake up mode. Synchronous bus
interface is used for all communication between host and OCTART.
It is fabricated using Philips 1.0 micron CMOS technology that
combines the benefits of low cost, high density and low power
consumption.
The operating speed of each receiver and transmitter can be
selected independently from one of 22 fixed baud rates, a 16X clock
derived from one of two programmable baud rate counters or one of
three external 16X clocks (1 available at 1x clock rate). The baud
rate generator and counter can operate directly from a crystal or
from seven other external or internal clock inputs. The ability to
independently program the operating speed of the receiver and
transmitter makes the Octal UART particularly attractive for dual
speed full duplex channel applications such as clustered terminal
systems. The receivers and transmitters are buffered with FIFOs of
16 characters to minimize the potential for receiver overrun and to
reduce interrupt overhead. In addition, a handshaking capability and
in鈥揵and flow control are provided to disable a remote UART
transmitter when the receiver buffer is full or nearly so.
To minimize interrupt overhead an interrupt arbitration system is
included which reports the context of the interrupting UART via
direct access or through the modification of the interrupt vector. The
context of the interrupt is reported as channel number, type of
device interrupting ( receiver COS etc.) and, for transmitters or
receivers, the fill level of the FIFO.
The Octal UART provides a power down mode in which the
oscillator is stopped but the register contents are maintained. This
results in reduced power consumption of several orders of
magnitudes. The Octal UART is fully TTL compatible when
operating from a single +5V power supply. Operation at 3.3 volts is
maintained with CMOS interface levels.
The device also offered in a version which maintains TTL input and
output levels while operating with a 3.3 volt power supply.
Detailed Descriptions . . . . . . . . . . . . . . . . . . . . . . . 342
Receiver and Transmitter . . . . . . . . . . . . . . . . . . . 342
Transmitter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Transmitter Status Bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Transmission of 鈥漛reak鈥?. . . . . . . . . . . . . . . . . . . . . . . . . . . .
1x and 16x modes, Transmitter . . . . . . . . . . . . . . . . . . . . .
Transmitter FIFO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1x and 16x mode, Receiver . . . . . . . . . . . . . . . . . . . . . . . . .
Receiver Status Bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Receiver FIFO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
RxFIFO Status: Status reporting modes . . . . . . . . . . . . . .
I/O ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
General Purpose Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Global Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Character Recognition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Xon Xoff Characters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Multi-drop or Wake up or 9 bit mode . . . . . . . . . . . . . . . . .
Character Stripping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Interrupt Arbitration and IRQN generation . . . . . . . . . . . . . . . .
IACKN Cycle, Update CIR . . . . . . . . . . . . . . . . . . . . . . . . . .
Polling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Enabling and Activating Interrupt sources . . . . . . . . . . . . .
Setting Interrupt Priorities . . . . . . . . . . . . . . . . . . . . . . . . . .
Major Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Minor Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Watch-dog Timer Time鈥搊ut Mode . . . . . . . . . . . . . . . . . . .
Wake Up Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Xon/Xoff Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
342
342
343
343
343
343
343
343
344
344
344
345
345
345
345
345
345
345
346
346
346
346
347
348
348
348
349
Modes of Operation . . . . . . . . . . . . . . . . . . . . . . . . 347
REGISTER DEfiniTIONS . . . . . . . . . . . . . . . . . . . . 351
MR 鈥?Mode Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 351
UCIR 鈥?Update CIR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 360
General Purpose Output Pin Control . . . . . . . . 361
Register Maps . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 363
Register Map Summary . . . . . . . . . . . . . . . . . . . . . 363
1995 May 1
336
853-1756 15179

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