S25FL Family (Serial Peripheral Interface)
S25FL002D, S25FL001D
2 Megabit, 1 Megabit CMOS 3.0 Volt Flash Memory
with 25 MHz SPI Bus Interface
PRELIMINARY
INFORMATION
Distinctive Characteristics
ARCHITECTURAL ADVANTAGES
Single power supply operation
鈥?Full voltage range: 2.7 to 3.6 V read and program
operations
Memory Architecture
鈥?2 Mb 鈥?Four sectors with 512 Kb each
鈥?1 Mb 鈥?Four sectors with 256 Kb each
Program
鈥?Page Program (up to 256 bytes) in 6 ms (typical)
鈥?Program cycles are on a page by page basis
Erase
鈥?0.25 s typical sector erase time (S25FL001D)
鈥?0.5 s typical sector erase time (S25FL002D)
鈥?1.0 s typical bulk erase time (S25FL001D)
鈥?2.0 s typical bulk erase time (S25FL002D)
Endurance
鈥?100,000 cycles per sector typical
Data Retention
鈥?20 years typical
Device ID
鈥?Electronic signature
Process Technology
鈥?Manufactured on 0.25 碌m process technology
Package Option
鈥?Industry Standard Pinouts
鈥?150 mil 8-pin SO package for 1Mb and 2Mb
鈥?208 mil 8-pin SO package for 2Mb only
鈥?8-contact WSON leadless package (6x5 mm)
PERFORMANCE CHARACTERISTICS
Speed
鈥?25 MHz clock rate (maximum)
Power Saving Standby Mode
鈥?Standby Mode 1 碌A(chǔ) (typical)
Memory Protection Features
Memory Protection
鈥?W# pin works in conjunction with Status Register Bits
to protect specified memory areas
鈥?Status Register Block Protection bits (BP1, BP0) in
status register configure parts of memory as read-
only
SOFTWARE FEATURES
SPI Bus Compatible Serial Interface
Publication Number
30167
Revision
A
Amendment
+1
Issue Date
June 9, 2004