音影先锋亚洲天堂网|电影世界尽头的爱完整版播放|国产 熟女 91|高清无码免费观看欧美日韩|韩国一区二区三区黄色录像|美女亚洲加勒比在线|亚洲综合网 开心五月|7x成人在线入口|成人网站免费日韩毛片区|国产黄片?一级?二级?三级

RHFXH162373K-01Q Datasheet

  • RHFXH162373K-01Q

  • Rad hard low voltage CMOS 16-bit D-type latch (3-state) with...

  • 17頁

  • STMICROELECTRONICS   STMICROELECTRONICS

掃碼查看芯片數(shù)據(jù)手冊

上傳產(chǎn)品規(guī)格書

PDF預(yù)覽

54VCXH162373
Rad hard low voltage CMOS 16-bit D-type latch (3-state)
with 3.6V tolerant inputs and outputs
Features
鈻?/div>
鈻?/div>
1.65 to 3.6V inputs and outputs
High speed:
鈥?t
PD
= 3.3ns (Max) at V
CC
= 3.0 to 3.6V
鈥?t
PD
= 4.5ns (Max) at V
CC
= 2.3 to 2.7V
Symmetrical impedance outputs:
鈥?|I
OH
| = I
OL
= 12mA (Min) at V
CC
= 3.0V
鈥?|I
OH
| = I
OL
= 8mA (Min) at V
CC
= 2.3V
Power down protection on inputs and outputs
26鈩?serie resistors in outputs
Operating voltage range:
鈥?V
CC
(Opr) = 1.65V to 3.6V
Pin and function compatible with 54 SERIES
HR162373
Bus hold provided on both sides
Cold spare function
Latch-up performance exceeds
300mA (JESD 17)
ESD performance:
鈥?HBM > 2000V
(MIL STD 883 method 3015); MM > 200V
300KRad Mil1019.6 Condition A, (RHA QML
qualification extension undergone)
No SEL, no SEU under 72 Mev/cm2/mg LET
heavy ions irradiation
QML qualified product
Device fully compliant with
DSCC SMD 5962-05211
Flat-48
鈻?/div>
鈻?/div>
鈻?/div>
鈻?/div>
鈻?/div>
鈻?/div>
鈻?/div>
鈻?/div>
鈻?/div>
Description
The 54VCXH162373 is a low voltage CMOS 16
bit d-type latch with 3 state outputs non inverting
fabricated with sub-micron silicon gate and five-
layer metal wiring C
2
MOS technology. It is ideal
for low power and very high speed 1.65 to 3.6V
applications; it can be interfaced to 3.6V signal
environment for both inputs and outputs.
These 16 bit D-TYPE latches are bite controlled
by two latch enable inputs (nLE) and two output
enable inputs (OE).
While the nLE input is held at a high level, the nQ
outputs will follow the data input precisely.
When the nLE is taken low, the nQ outputs will be
in a normal logic state (high or low logic level) and
while high level the outputs will be in a high
impedance state. Bus hold on data inputs is
provided in order to eliminate the need for
external pull-up or pull-down resistor. The device
circuits is including 26鈩?series resistance in the
outputs. These resistors permit to reduce line
noise in high speed applications.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
鈻?/div>
鈻?/div>
鈻?/div>
鈻?/div>
July 2007
Rev 4
1/17
www.st.com
17

RHFXH162373K-01Q相關(guān)型號(hào)PDF文件下載

掃碼下載APP，
一鍵連接廣大的電子世界。

在線人工客服

買家服務(wù)：
賣家服務(wù)：
技術(shù)客服：

0571-85317607

網(wǎng)站技術(shù)支持

13606545031

客服在線時(shí)間周一至周五
9:00-17:30

關(guān)注官方微信號(hào)，
第一時(shí)間獲取資訊。

建議反饋

聯(lián)系人：

聯(lián)系方式：

按住滑塊，拖拽到最右邊
>>
感謝您向阿庫提出的寶貴意見，您的參與是維庫提升服務(wù)的動(dòng)力！意見一經(jīng)采納，將有感恩紅包奉上哦！