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R65C51P2E Datasheet

  • R65C51P2E

  • ASYNCHRONOUS COMMUNICATIONS INTERFACE ADAPTER

  • 19頁

  • ETC

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R65C51
ASYNCHRONOUS COMMUNICATIONS
PRELiMlNARY
DESCRIPTION
The Rockwell CMOS R65C51 Asynchronous Communications
Interface Adapter (ACIA) provides an easily implemented, pro-
gram controlled interface between 8-bit microprocessor-based
systems and serial communication data sets and modems.
The ACIA has an internal baud rate generator. This feature elim-
inates the need for multiple component support circuits, a crystal
being the only other part required. The Transmitter baud rate
can be selected under program control to be either 1 of 15 dif-
ferent rates from 50 to 19,200 baud, or at
l/16
times
an external
clock rate. The Receiver baud rate may be selected under pro-
gram control to be either the Transmitter rate, or at
l/16
times
the external clock rate. The ACIA has programmable word
lengths of 5, 6, 7, or 8 bits; even, odd, or no parity; 1,
1'12,
or
2 stop bits.
The ACIA is designed for maximum programmed
the microprocessor (MPU), to simplify hardware
tion. Three separate registers permit the MPU to
the R65C51鈥檚 operating modes and鈥?data checking
and determine operational status.
control from
implementa-
easily select
parameters
FEATURES
Low power CMOS N-well silicon gate technology
Direct replacement for NMOS R6551 ACIA
Full duplex operation with buffered receiver and transmitter
Data set/modem control functions
Internal baud rate generator
rates (50 to 19,200)
.
with 15 programmable
bau
Program-selectable
rate
internally or鈥檈xternally controlled receive
.
Programmable word lengths, number of stop bits, and pant
bit generation and detection
Programmable
Program reset
Program-selectable
serial echo mode
Two chip selects
1 or 2 MI-Q operation
5.0 Vdc t 5% supply requirements
28-pin plastic or ceramic DIP
Full TTL compatibility
Compatible
processors
with.
R6500,
R6500/鈥?/div>
and
R65COO micro-
interrupt control
The Command Register controls parity, receiver echo mode,
transmitter interrupt control, the state of the RTS line, receiver
interrupt control, and the state of the DTR line.
The Control Register controls the number of stop bits, word
length, receiver clock source, and baud rate.
--
The Status Register indicates the states of the IRQ, DSR, and
DCD lines. Transmitter and Receiver Data Registers, and
Overrun, Framing, and Parity Error conditions,
The Transmitter and Receiver Data Registers are used for tem-
porary data storage by the ACIA Transmit and Receiver circuits.
ORDERING
INFORMATION
Part No.: R65C51
Temperature Range
(TL to TH):
Blank = 0% to +70擄C
E= -40% to +85%
-
Frequency Range:
1 = 1 MHz
2 = 2 MHz
Package:
C = Ceramic
P = Plastic
Figure 1.
R65C51 AClA Pin Configuration
Product
Description
Order No. 2157
Rev. 3,
October 1984
Document
No. 29651
N60
2-296

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