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Minimum Timekeeping supply voltage TYP:0.66 to 5.5v (Worst: 1.00V to 5.5v); VDD pin
Low power consumption
0.45碌A(chǔ) TYP at V
DD
=3V (1.00碌A(chǔ) MAX.)
Two signal lines (SCL, SDA) required for connection to the CPU.
Time counters (counting hours, minutes, and seconds) and calendar counters (counting years, months, days,
and weeks) (in BCD format)
Interrupt circuit configured to generate interrupt signals (with interrupts ranging from 0.5 seconds to 1 month) to
the CPU and provided with an interrupt flag and an interrupt halt
2 alarm interrupt circuits (Alarm_W for week, hour, and minute alarm settings and Alarm_D for hour and minute
alarm settings)
With Power-on flag to prove that the power supply starts from 0V
32-kHz clock output pin (CMOS push-pull output with control pin)
Supply voltage monitoring circuit with two supply voltage monitoring threshold settings
Automatic identification of leap years up to the year 2099
Selectable 12-hour and 24-hour mode settings
High precision oscillation adjustment circuit
Built-in oscillation stabilization capacitors (CG and CD)
Package TSSOP10G (4.0mm x 2.9mm x 1.0mm: R2023T) FFP12 (2.0mm x 2.0mm x 1.0mm: R2023K)
CMOS process
1