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1.2ns part-to-part skew
Std., A, and B speed grades
Available in QSOP and SOIC packages
QS5805/A/B
DESCRIPTION
The QS5805 clock buffer/driver circuits can be used for clock buffering
schemes where low skew is a key parameter. This device offers two banks
of five non-inverting outputs. The QS5805 device provides low propagation
delay buffering with on-chip skew of 0.7ns for same-transition, same-bank
signals.
The QS5805 is characterized for operation at -40擄C to +85擄C.
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FUNCTIONAL BLOCK DIAGRAM
OE A
5
IN A
OA 5
OA 1
MON
5
IN B
OB 5
OB 1
OE B
INDUSTRIAL TEMPERATURE RANGE
1
c
1999
Integrated Device Technology, Inc.
JULY 2000
DSC-4579/-
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