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QS52805TSO Datasheet

  • QS52805TSO

  • FIVE DISTRIBUTED-OUTPUT CLOCK DRIVER|FCT/PCT-CMOS|SOP|20PIN|...

  • 6頁(yè)

  • ETC

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QS52805T/AT
GUARANTEED LOW SKEW CMOS CLOCK DRIVER/BUFFER
INDUSTRIAL TEMPERATURE RANGE
GUARANTEED LOW SKEW
CMOS CLOCK
DRIVER/BUFFER
FEATURES:
鈭?/div>
鈭?/div>
10 output, low skew signal buffer
Guaranteed low skew:
鈥?/div>
0.7ns output skew (same bank)
鈥?/div>
0.9ns output skew (different bank)
鈥?/div>
1ns part-to-part skew
25鈩?on-chip resistors available for low noise
Input hysteresis for better noise margin
Monitor output
Undershoot clamp diodes on all inputs
Std. and A speed grades
Available in QSOP and SOIC packages
QS52805T/AT
DESCRIPTION
The QS52805T clock buffer/driver circuits can be used for clock buffering
schemes where low skew is a key parameter. This device offers two banks
of five non-inverting outputs. This device provides low propagation delay
buffering with on-chip skew of 0.7ns for same-transition, same-bank signals.
The QS52805T has on-chip series termination resistors for lower noise
clock signals. The QS52805T series resistor version is recommended for
driving unterminated lines with capacitive loading and other noise sensitive
clock distribution circuits. These clock buffer products are designed for use
in high-performance workstations and in embedded and personal comput-
ing systems. Several devices can be used in parallel or scattered throughout
a system for guaranteed low skew, system-wide clock distribution networks.
The QS52805T is characterized for operation at -40擄C to +85擄C.
鈭?/div>
鈭?/div>
鈭?/div>
鈭?/div>
鈭?/div>
鈭?/div>
FUNCTIONAL BLOCK DIAGRAM
OE
A
5
IN
A
OA
5
OA
1
MON
5
IN
B
OB
5
OB
1
OE
B
NOTE:
This device has 25鈩?series termination resistors on each clock output including monitor.
INDUSTRIAL TEMPERATURE RANGE
1
c
1999
Integrated Device Technology, Inc.
AUGUST 2000
DSC-5480/-

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