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8 388 608 words by 36-Bit organization in 2 banks
Fast access and cycle time
60 ns RAS access time
15 ns CAS access time
104 ns cycle time
Hyper page mode (EDO) capability
25 ns cycle time
Single + 5 V (鹵 10 %) supply
Low power dissipation
max. 7260 mW active
CMOS 鈥?132 mW standby
TTL 鈥?264 mW standby
CAS-before-RAS refresh
RAS-only-refresh
Hidden-refresh
24 decoupling capacitors mounted on substrate
All inputs, outputs and clocks fully TTL compatible
72 pin Single in-Line Memory Module (L-SIM-72-17) with 31.75 mm (1250 mil) height
Utilizes 24 4M x 3 DRAM鈥檚 in 300 mil SOJ packages
2048 refresh cycles / 32 ms
Optimized for use in byte-write parity applications
Tin-Lead contact pads (HYM 368035S-60)
Gold contact pads (HYM 368035GS-60)
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Semiconductor Group
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Q67100-Q3019相關(guān)型號PDF文件下載
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英文版
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