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Q67100-Q2009 Datasheet

  • Q67100-Q2009

  • 1M x 32-Bit Dynamic RAM Module

  • 9頁

  • INFINEON   INFINEON

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1M x 32-Bit Dynamic RAM Module
(2M x 16-Bit Dynamic RAM Module)
HYM 321160S/GS-60/-70
Advanced Information
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1 048 576 words by 32-bit organization
(alternative 2 097 152 words by 16-bit)
Fast access and cycle time
60 ns access time
110 ns cycle time (-60 version)
70 ns access time
130 ns cycle time (-70 version)
Fast page mode capability with
40 ns cycle time (-60 version)
45 ns cycle time (-70 version)
Single + 5 V (鹵 10 %) supply
Low power dissipation
max. 4840 mW active (-60 version)
max. 4400 mW active (-70 version)
CMOS 鈥?44 mW standby
TTL
鈥?88 mW standby
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CAS-before-RAS refresh, RAS-only-refresh,
Hidden refresh
8 decoupling
substrate
capacitors
mounted
on
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All inputs, outputs and clock fully TTL
compatible
72 pin Single in-Line Memory Module
Utilizes eight 1M
脳
4-DRAMs in 300 mil SOJ
packages
1024 refresh cycles /16 ms
Tin-Lead contact pads (S - version)
Gold contact pads (GS - version)
single sided module with 25.4 mm (1000 mil)
height
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
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鈥?/div>
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Ordering Information
Type
HYM 321160S-60
HYM 321160S-70
HYM 321160GS-60
HYM 321160GS-70
Ordering Code
Q67100-Q2010
on request
Q67100-Q2009
on request
Package
L-SIM-72-11
L-SIM-72-11
L-SIM-72-11
L-SIM-72-11
Descriptions
DRAM module
(access time 60 ns)
DRAM module
(access time 70 ns)
DRAM module
(access time 60 ns)
DRAM module
(access time 70 ns)
Semiconductor Group
541
09.94

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