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Q5962R9578101VCC Datasheet

  • Q5962R9578101VCC

  • Radiation Hardened Quad 2-Input OR Gate

  • 11頁

  • INTERSIL   INTERSIL

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HCS32MS
Data Sheet
April 11, 2007
FN3057.1
Radiation Hardened Quad 2-Input OR
Gate
The Intersil HCS32MS is a Radiation Hardened Quad 2-Input
OR Gate. A low on both inputs forces the output to a low state.
The HCS32MS utilizes advanced CMOS/SOS technology to
achieve high-speed operation. This device is a member of the
radiation hardened, high-speed, CMOS/SOS Logic Family.
The HCS32MS is supplied in a 14 Ld Ceramic flatpack
(K suffix) or a SBDIP Package (D suffix).
Features
鈥?3 Micron Radiation Hardened SOS CMOS
鈥?Total Dose 200k RAD (Si)
鈥?SEP Effective LET No Upsets: >100 MEV-cm
2
/mg
鈥?Single Event Upset (SEU) Immunity < 2 x 10
-9
Errors/Bit-Day (Typ)
鈥?Latch-Up Free Under Any Conditions
鈥?Military Temperature Range: -55擄C to +125擄C
鈥?Significant Power Reduction Compared to LSTTL ICs
Ordering Information
PART
NUMBER
PART
MARKING
TEMP.
RANGE (擄C)
PACKAGE
PKG.
DWG. #
D14.3
鈥?DC Operating Voltage Range: 4.5V to 5.5V
鈥?Input Logic Levels
鈥?V
IL
= 30% of V
CC
Max
鈥?V
IH
= 70% of V
CC
Min
鈥?Input Current Levels I
i
鈮?/div>
5碌A(chǔ) @ VOL, VOH
HCS32DMSR Q 5962R95 -55擄C to +125擄C 14 Ld SBDIP
78101VCC
HCS32KMSR Q 5962R95 -55擄C to +125擄C 14 Ld Ceramic K14.A
78101VXC
Flatpack
HCS32D/
Sample
HCS32K/
Sample
HCS32HMSR
+25擄C
+25擄C
+25擄C
14 Ld SBDIP
14 Ld Ceramic
Flatpack
Die
Functional Diagram
An
(1, 4, 9, 12)
Yn
Intersil Pb-free hermetic packaged products employ SnAgCu or Au
termination finish, which are RoHS compliant termination finishes and
compatible with both SnPb and Pb-free soldering operations. Ceramic
dual in-line packaged products (CerDIPs) do contain lead (Pb) in the
seal glass and die attach glass materials. However, lead in the glass
materials of electronic components are currently exempted per the
RoHS directive. Therefore, ceramic dual inline packages with Pb-free
termination finish are considered to be RoHS compliant.
(3, 6, 8, 11)
Bn
(2, 5, 10, 13)
TABLE 1. TRUTH TABLE
INPUTS
An
L
L
H
H
NOTE:
Bn
L
H
L
H
OUTPUTS
Yn
L
H
H
H
L = Logic Level Low, H = Logic level High
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 1995, 2007. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.

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