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5-Pin Mount Option
(Suffixes L & M)
Description
The PT5040 is a series of 3-pin
boost-voltage Integrated Switching
Regulators (ISRs). These ISRs are
designed for use with +5V bus systems
that require an additional regulated
+8V to +20V with up to 1A of output
current. These ISRs are packaged in
the 3-pin, single in-line pin (SIP)
package configuration.
Pin-Out Information
Pin
Function
V
in
GND
V
out
Ordering Information
PT5041o
= +12 Volts
PT5042o
= +15 Volts
PT5044o
= +8 Volts
PT5045o
= +9 Volts
PT5046o
= +10 Volts
PT5047o
= +18 Volts
PT5048o
= +12.6 Volts
PT5049o
= +20 Volts
PT Series Suffix
(PT1234x )
Case/Pin
Configuration
Vertical
Horizontal
SMD
Horizontal, 2-pin Tab
SMD, 2-Pin Tab
Order
Suffix
Package
Code *
(EAD)
(EAA)
(EAC)
(EAM)
(EAL)
Standard Application
+V
in
1
1
2
+V
out
PT5040
2
3
3
C
1
C
2
C
3
100碌F
+
N
A
C
M
L
* Previously known as package styles 100/110.
(Reference the applicable package code drawing
for the dimensions and PC board layout)
COM
C
1
= Optional ceramic (1-5碌F)
C
2
= Optional ceramic (1-5碌F)
C
3
= Required Electrolytic (100碌F)
COM
NOTE: Boost Topology ISRs are not Short-Circuit Protected.
Specifications
Characteristics
Output Current
(Unless otherwise stated, T
a
=25擄C, V
in
=5V, I
o
=I
o
max, C
3
=100碌F)
PT5040 SERIES
Symbol
I
o
Conditions
Over V
in
range
PT5049
PT5047
PT5041/48
PT5042
PT5044
PT5045/46
PT5047/5049
Min
0.1
0.1
0.1
0.1
0.1
0.1
(1)
(1)
(1)
(1)
(1)
(1)
Typ
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鹵1.5
鹵0.5
鹵0.5
85
鹵2
500
3.0
150
(2)
5.5
(3)
1
650
800
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40
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5
20
(5)
4.5
6.5
Max
0.5
0.6
1.0
0.75
1.5
1.2
(V
o
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1)
14
鹵3.0
鹵1.0
鹵1.0
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鹵5
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5.0
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800
950
+85
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+125
G鈥檚
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(4)
Units
A
Input Voltage Range
Output Voltage Tolerance
Line Regulation
Load Regulation
Efficiency
V
o
Ripple (pk-pk)
Transient Response
Current Limit
Inrush Current
Switching Frequency
Operating Temperature Range
Thermal Resistance
Storage Temperature
Mechanical Shock
Mechanical Vibration
Per Mil-STD-883D, 20-2000 Hz
Weight
Notes:
(1)
(2)
(3)
(4)
(5)
V
in
鈭哣
o
Reg
line
Reg
load
畏
V
r
t
tr
V
os
I
lim
I
ir
t
ir
茠
s
T
a
Over Io range
4.75
4.75
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V
%V
o
%V
o
%V
o
%
%V
o
碌Sec
%V
o
%I
o
max
A
mSec
kHz
擄C
擄C/W
擄C
Over V
in
Range
T
a
= -20擄C to SOA derating limit
(3)
Over V
in
range
I
o
min
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I
o
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I
o
max
I
o
=0.5A
20MHz bandwidth
25% load change
V
o
over/undershoot
On start up
Over V
in
and I
o
ranges
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Free Air Convection
(40-60LFM)
Per Mil-STD-883D, Method 2002.3
1 msec, Half Sine, mounted to a fixture
Suffixes N, A, & C
Suffixes L & M
Suffixes N, A, & C
Suffixes L & M
V
o
<15V
V
o
>15V
500
650
-20
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-40
胃
ja
T
s
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500
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G鈥檚
grams
The ISR will operate at no load with reduced specifications.
Boost topology ISRs are not short circuit protected.
The inrush current stated is above the normal input current for the associated output load.
See Safe Operating Area curves or consult the factory for the appropriate derating
The tab pins on the 5-pin mount package types (suffixes L & M) must be soldered. For more information see the applicable package outline drawing.
For technical support and more information, see inside back cover or visit www.ti.com
PT5046L 產(chǎn)品屬性
350
電源 - 板載
DC DC Converters
PT5040
非隔離（POL）
1
9V
10V
-
-
1.2A
12W
*
*
表面貼裝
3-SIP SMD 模塊
-
托盤
-20°C ~ 85°C
85%
12W
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