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PSD4256G6V-10UT Datasheet

  • PSD4256G6V-10UT

  • Flash In-System Programmable ISP Peripherals for 16-bit MCUs

  • 100頁

  • STMICROELECTRONICS   STMICROELECTRONICS

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PSD4256G6V
Flash In-System Programmable (ISP)
Peripherals for 16-bit MCUs
PRELIMINARY DATA
FEATURES SUMMARY
PSD provides an integrated solution to 16-bit
MCU-based applications that includes config-
urable memories, PLD logic, and I/O:
s
Dual bank Flash memories
鈥?8Mbits of Primary Flash Memory (16 uniform
sectors, 64Kbyte)
鈥?512Kbits of Secondary Flash Memory with 4
sectors
鈥?Concurrent operation: READ from one mem-
ory while erasing and writing the other
s
s
s
High Endurance:
鈥?100,000 Erase/WRITE Cycles of Flash Mem-
ory
鈥?1,000 Erase/WRITE Cycles of PLD
鈥?15 Year Data Retention
s
Single Supply Voltage
鈥?3V (+20%/鈥?0%)
Memory Speed
鈥?100ns Flash memory and SRAM access time
for V
CC
= 3V (+20%/鈥?0%)
鈥?90ns Flash memory and SRAM access time
for V
CC
= 3.3V (+/鈥?0%)
s
256Kbits of SRAM (battery-backed)
PLD with Macrocells
鈥?Over 3000 Gates of PLD: CPLD and DPLD
鈥?CPLD with 16 Output Macrocells (OMCs) and
24 Input Macrocells (IMCs)
鈥?DPLD - user defined internal chip select de-
coding
Figure 1. 80-lead, Thin, Quad, Flat Package
s
Seven l/O Ports with 52 I/O pins:
52 individually configurable I/O port pins that
can be used for the following functions:
鈥?MCU I/Os
鈥?PLD I/Os
鈥?Latched MCU address output
鈥?Special function I/Os
鈥?l/O ports may be configured as open-drain
outputs
TQFP80 (U)
s
In-System Programming (ISP) with JTAG
鈥?Built-in JTAG compliant serial port allows full-
chip In-System Programmability
鈥?Efficient manufacturing allow easy product
testing and programming
鈥?Use low cost FlashLINK cable with PC
s
Page Register
鈥?Internal page register that can be used to ex-
pand the microcontroller address space by a
factor of 256
s
Programmable power management
1/100
December 2002
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.

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