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PLL1707DBQR Datasheet

  • PLL1707DBQR

  • 3.3 V DUAL PLL MULTICLOCK GENERATOR

  • 171.14KB

  • 22頁

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PLL1707
PLL1708
SLES065 鈥?DECEMBER 2002
3.3 V DUAL PLL MULTICLOCK GENERATOR
FEATURES
D
27-MHz Master Clock Input
D
Generated Audio System Clock (PLL1707):
鈥?SCKO0: 768 f
S
(f
S
= 44.1 kHz)
鈥?SCKO1: 768 f
S
, 512 f
S
(f
S
= 48 kHz)
鈥?SCKO2: 256 f
S
(f
S
= 32, 44.1, 48, 64, 88.2,
96 kHz)
鈥?SCKO3: 384 f
S
(f
S
= 32, 44.1, 48, 64, 88.2,
96 kHz)
Generated Audio System Clock (PLL1708):
鈥?SCKO0: 768 f
S
(f
S
= 44.1 kHz)
鈥?SCKO1: 768 f
S
, 512 f
S
, 384 f
S
, 256 f
S
(f
S
= 48 kHz)
鈥?SCKO2: 256 f
S
(f
S
= 16, 22.05, 24, 32, 44.1,
48, 64, 88.2, 96 kHz)
鈥?SCKO3: 384 f
S
(f
S
= 16, 22.05, 24, 32, 44.1,
48, 64, 88.2, 96 kHz)
Zero PPM Error Output Clocks
Low Clock Jitter: 50 ps (Typical)
Multiple Sampling Frequencies (PLL1707):
鈥?f
S
= 32, 44.1, 48, 64, 88.2, 96 kHz
Multiple Sampling Frequencies (PLL1708):
鈥?f
S
= 16, 22.05, 24, 32, 44.1, 48, 64, 88.2,
96 kHz
3.3-V Single Power Supply
PLL1707: Parallel Control
PLL1708: Serial Control
Package: 20-Pin SSOP (150 mil), Lead-Free
Product
APPLICATIONS
D
D
D
D
D
D
D
HDD + DVD Recorders
DVD Recorders
HDD Recorders
DVD Players
DVD Add-On Cards for Multimedia PCs
Digital HDTV Systems
Set-Top Boxes
D
DESCRIPTION
The PLL1707
鈥?/div>
and PLL1708
鈥?/div>
are low cost, phase-locked
loop (PLL) multiclock generators. The PLL1707 and
PLL1708 can generate four system clocks from a 27-MHz
reference input frequency. The clock outputs of the
PLL1707 can be controlled by sampling frequency-control
pins and those of the PLL1708 can be controlled through
serial-mode control pins. The device gives customers both
cost and space savings by eliminating external
components and enables customers to achieve the very
low-jitter performance needed for high performance audio
DACs and/or ADCs. The PLL1707 and PLL1708 are ideal
for MPEG-2 applications which use a 27-MHz master
clock such as DVD recorders, HDD recorders, DVD
add-on cards for multimedia PCs, digital HDTV systems,
and set-top boxes.
D
D
D
D
D
D
D
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate
precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to
damage because very small parametric changes could cause the device not to meet its published specifications.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments
semiconductor products and disclaimers thereto appears at the end of this data sheet.
鈥燭he PLL1707 and PLL1708 use the same die and they are electrically identical except for mode control.
PRODUCTION DATA information is current as of publication date. Products
conform to specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all parameters.
Copyright
錚?/div>
2002, Texas Instruments Incorporated

PLL1707DBQR 產(chǎn)品屬性

  • 2,000

  • 集成電路 (IC)

  • 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器，PLL，頻率合成器

  • -

  • PLL 多時(shí)鐘發(fā)生器

  • 是

  • CMOS，晶體

  • CMOS

  • 1

  • 1:6

  • 無/無

  • 36.864MHz

  • 是/無

  • 2.7 V ~ 3.6 V

  • -25°C ~ 85°C

  • 表面貼裝

  • 20-SSOP（0.154"，3.90mm 寬）

  • 20-SSOP/QSOP

  • 帶卷 (TR)

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