鈥?/div>
C compiler optimized architecture/instruction set
Linear program memory addressing to 64 Kbytes
Linear data memory addressing of 4 Kbytes
Up to 10 MIPs operation
16-bit wide instructions, 8-bit wide data path
Priority levels for interrupts
31-level, software accessible hardware stack
8 x 8 Single Cycle Hardware Multiplier
Special Microcontroller Features:
鈥?100 erase/write cycle Standard FLASH program
memory typical
鈥?Power-on Reset (POR), Power-up Timer (PWRT)
and Oscillator Start-up Timer (OST)
鈥?Watchdog Timer (WDT) with its own on-chip
RC oscillator for reliable operation
鈥?Programmable code protection
鈥?Wide operating voltage range (2.0V to 5.5V)
鈥?In-Circuit Serial Programming鈩?(ICSP鈩? via
two pins
鈥?In-Circuit Debug via two pins
Flexible Oscillator Structure:
Four Crystal modes up to 40 MHz
4X Phase Lock Loop
Two External Clock modes up to 40 MHz
Internal oscillator block:
- 8 user selectable frequencies: 31 kHz to 8 MHz
- OSCTUNE can compensate for frequency drift
鈥?Secondary oscillator using Timer1 @ 32 kHz
鈥?Fail-Safe Clock Monitor:
- Allows for safe shutdown of device if clock fails
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Power Managed Modes:
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
RUN
CPU on, peripherals on
IDLE
CPU off, peripherals on
SLEEP CPU off, peripherals off
IDLE mode currents down to 5.8
碌A
typical
SLEEP current down to 0.1
碌A
typical
Timer1 oscillator 1.1
碌A
typical, 32 kHz, 2V
Watchdog Timer 2.1
碌A
typical
Two-Speed Oscillator Start-up
Peripheral Features:
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
High current sink/source 25 mA/25 mA
Three external interrupt pins
Four Timer modules (Timer0 - Timer3)
Secondary low power oscillator clock option -
Timer1/Timer3
Up to two Capture/Compare/PWM (CCP) modules,
one with Auto-Shutdown
Enhanced Capture/Compare/PWM (ECCP)
module with Auto-Shutdown and up to 4 PWM
outputs (PIC18F4515 and PIC18F4610 only)
Master Synchronous Serial Port (MSSP) module
with two modes of operation:
- 3-wire SPI鈩?(supports all 4 SPI modes)
- I
2
C鈩?Master and Slave mode
Addressable USART module:
- LIN bus support
Analog Features:
鈥?10-bit Analog-to-Digital Converter module (A/D)
- Auto-acquisition capability
- Conversion available during SLEEP
鈥?Programmable 16-level Low Voltage Detection
(LVD) module
- Supports Interrupt-on-Low Voltage Detection
鈥?Programmable Brown-out Reset (BOR)
鈥?Two Analog comparators with input multiplexing
鈥?/div>
鈥?/div>
Comparators
LIN/USART
1
1
1
1
Device
(1)
Program
Memory
Data
Memory
Pins
I/O
PIC18F2515
48K x 8
4K x 8
28
25
10-ch
2
2/0
Yes
No
PIC18F2610
64K x 8
4K x 8
28
25
10-ch
2
2/0
Yes
No
PIC18F4515
48K x 8
4K x 8
40/44
36
13-ch
2
1/1
Yes
Yes
PIC18F4610
64K x 8
4K x 8
40/44
36
13-ch
2
1/1
Yes
Yes
Note 1:
These devices do not provide User mode program/erase features of the program memory.
1
1
1
1
錚?/div>
2003 Microchip Technology Inc.
Advance Information
DS30496A-page 1
Timers
8-bit/16-bit
1/3
1/3
1/3
1/3
10-bit A/D
Channels
BOR/LVD
MSSP
CCP/
ECCP
PSP
next
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