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PI74FCT162Q374DTB Datasheet

  • PI74FCT162Q374DTB

  • 16-Bit D-Type Flip-Flop

  • 210.76KB

  • 6頁

  • ETC

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Logic Block Diagram
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PI74FCT162Q374T
Fast Low Noise CMOS 16-Bit
Registers (3-State)
Product Features
聲 V
CC
= 5V 鹵10%
聲 Balanced output drivers:
鹵12 mA
聲 Output impedance:
35鈩?(typical)
聲 Typical V
OLP
(Output Ground Bounce) < 0.5V
at V
CC
= 5V, TA = 25擄C
聲 Bus Hold retains last active bus state during tri-state
聲 Hysteresis on all inputs
聲 Packages available:
聳 48-pin 240 mil wide plastic TSSOP (A)
聳 48-pin 300 mil wide plastic SSOP (V)
聳 48-pin 150 mil wide plastic BQSOP (B)
聲 Device models available on request
Product Description
Pericom Semiconductor聮s PI74FCT series of logic circuits are pro-
duced in the Company聮s advanced 0.6 micron CMOS technology,
achieving industry leading speed grades.
The PI74FCT162Q374T is a 16-bit octal register designed with 16 D-
type flip-flops with a buffered common clock and 3-state outputs.
The Output Enable (xOE) and clock (xCLK) controls are organized
to operate as two 8-bit registers or one 16-bit register. When OE is
HIGH, the outputs are in the high impedance state. Input data
meeting the setup and hold time requirements of the D inputs is
transferred to the xOx outputs on the LOW-to-HIGH transition of the
clock input.
The PI74FCT162Q374T is designed with current limiting resistors at
its outputs to control the output edge rate resulting in lower ground
bounce and undershoot. This device features a typical output
impedance of 35鈩?eliminating the need for external terminating
resistors for most bus interface applications. This noise suppression
benefit is designated by the letter "Q" (for quiet) in the part number.
The PI74FCT162Q374T has "Bus Hold" which retains the input's last
state whenever the input goes to high-impedance preventing
"floating" inputs and eliminating the need for pull-up/down resistors.
1
OE
2
OE
1
CLK
2
CLK
1
D
0
D
1
O
0
2
D
0
D
2
O
0
C
C
TO 7 OTHER CHANNELS
TO 7 OTHER CHANNELS
1
PS2082D
06/08/98

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